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Recent content by FlyingDutch

  1. FlyingDutch

    "udemy" IT technical courses - have an impact for perception of employee

    Hello Forum, I want to ask if completing the "udemy" technical courses and obtaining a certificate of completion, impact the employer's perception of the employee. I found several of these courses interesting from the point of view of my work. For example, I have finished such courses: ARM...
  2. FlyingDutch

    Aliexpress FPGAs are reliable?

    HI, I have two FPGA boards from QMTECH (bought on Aliexopress) - one with Artix7 (100K LUT) and the second with Spartan7. I have been using them for about three years and haven't had any issues so far. Best Regards
  3. FlyingDutch

    Development FPGA board with Gowin chip

    Yes, @KlausST you are right - I was going to answer in a different thread. Sorry, it was my mistake . Best Regards
  4. FlyingDutch

    Development FPGA board with Gowin chip

    Hello, I have no question the OP was asking for cheap programmable devices - so I answered :) Best Regards
  5. FlyingDutch

    Development FPGA board with Gowin chip

    Hello, forum, some time ago I published a post related to the FPGA board based on the Gowin GW1N-LV9LQ144C6/I5 chip. See post: https://www.edaboard.com/threads/development-board-with-fpga-gw1n-lv9lq144c6-i5.406819/#post-1754691 I ordered PCB in JLCPCB and then mounted the prototype. I...
  6. FlyingDutch

    Memory (DDR) for image processing FPGA board application

    Hello, it is easier (PCB design) to use external SPI PSRAM or HyperRAM ICs. Best Regards
  7. FlyingDutch

    Issues with git cloning repo with "RISC-V RV32IMC Toolchain"

    Hello, some time ago I published a thread with the FPGA development board based on the GW1N-LV9LQ144C6/I5 chip (produced by "Gowin Semiconductors).Here is link to this thread: https://www.edaboard.com/threads/development-board-with-fpga-gw1n-lv9lq144c6-i5.406819/#post-1754691 A few days ago...
  8. FlyingDutch

    Study material for FPGA implementation of OFDM Demodulator using Verilog?

    Hello, Google search gives for example these links: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/horizontal/vhd-cyclic-prefix-insertion-ofdm.html https://www.iprium.com/bins/pdf/iprium_ug_ofdm_modem.pdf...
  9. FlyingDutch

    usb host controller on fpga

    Hello, Gowin Semi has free IP cores implementing USB 2.0 on their FPGAs: https://www.gowinsemi.com/en/support/ip/ Regards
  10. FlyingDutch

    Microcontroller with 140 plus I/O

    Hello, for example MCU from family STM32F7 has 168 I/Os. See link: https://eu.mouser.com/ProductDetail/STMicroelectronics/STM32F746NEH6?qs=k5OWtXsTJaqX5q4W1tAL8g%3D%3D , but it has TFBGA-216 case which is hard to soldering by amateur. You can also use smaller MCU with LQFP144 case (easier to...
  11. FlyingDutch

    How to select a EDA software??

    Hello, IMHO the best EDA is "Altium Designer", it has many advanced features like: 1) Advanced stack-up manager 2) Many types of "vias" 3) Automatic impedance control of chosen traces 4) Length control of chosen traces 5) good performance "Altium Designer" however is costly. In my opinion...
  12. FlyingDutch

    FPGA to DDR connection

    Hello, some connection lines for DDR memory are high-speed signals and them have to be designed (PCB) with length and impedance matching. Best Regards
  13. FlyingDutch

    Error when trying to refer to components generated by "for .. generate" loop VHDL

    @kaz1, thanks for the clarification, now it seems to be clear to me. Best Regards
  14. FlyingDutch

    Error when trying to refer to components generated by "for .. generate" loop VHDL

    Hi @kaz1, I know that, but I would like to know why the given code caused an error. Thanks and Regards
  15. FlyingDutch

    Error when trying to refer to components generated by "for .. generate" loop VHDL

    Hello, forum I write a VHDL project in which I instantiate components by using the "for .. generate" loop. These components work fine (in real hardware), but I have also need to refer to them in process in top entity. I have an error when referring to generated components in process in the top...
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