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Recent content by Fávero Santos

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    PWM controller for Fixed Frequency Driver for fiber coupled optics

    Hi, @KlausST thanks anyway for your kind help and effort on understanding my issue. If I do not find any "out-of-the-box" solution I'll certainly have to design such controller. Fávero
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    PWM controller for Fixed Frequency Driver for fiber coupled optics

    @KlausST, I am trully sorry If I was not clear enough. Please find attached a diagram. Many thanks! 1627919091 Thank you, @danadakk for your kind suggestion. For now, I am looking for something OEM, although I am convinced such OEM solution is not available ... I am keeping your suggestion...
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    PWM controller for Fixed Frequency Driver for fiber coupled optics

    Hello, guys, how are you all? I am currently trying to find a PWM controller to interface it to a Fixed Frequency Driver (FFD) from Brinrose - the FFD then drives an AO modulator (at 1550 nm). Such FFD has TTL inputs (0-5V) and 330 ohms impedance. The issue is that I am unable to find a PWM...
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    [SOLVED] LVS mismatch for ncap family cell in GF130 nm

    Hi Dominik, based on your suggestion, I checked the subcircuit.cdl file that PVS calls when performing a LVS run. I observed that under dgncap, ncap pin definition, subckt was: and I believe it should be defined as G SD B, right? I made a copy of the file and updated it to and ran a new...
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    [SOLVED] LVS mismatch for ncap family cell in GF130 nm

    Hello, all! I was helping a student in our lab with a LVS mismatch error while using ncap cell. I verified the log of the LVS (I am using PVS) and I observed that the pin map is being updated to a new one: This happens when the option "DFII" is select in the "input" tab when using PVS GUI...
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    [LAYOUT] When pcell is created created, bulk and gate are shorted!

    Hello, guys, how are you? First of all, I'm using Cadence and Layout GXL (IC version is 6.1.8). Process is GF_8HP (available via MOSIS). I would like to ask if anyone know how to solve the following issue: When generating a nfet_rf cell into Layout GXL, I get four erros in the "Annotation...
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    What are the pros and cons of a multi-band PA if compared to a wide-band PA?

    Hi, ktr Many thanks on replying. Regarding Gain*BW = 1, their PA is nicelly flat (they report a gain flatness of 18.4 dB +- 1.5 dB for the BW) so it just bugs me that I can't see the difference of using their PA in 2.4 and 5 GHz than using a PA that can change the band from 2.4 to 5 GHz...
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    What are the pros and cons of a multi-band PA if compared to a wide-band PA?

    Hello, all! I'm curious on understanding better what are the pros and cons of a wide band PA over a multi band PA. I mean, if Hai-Feng Wu et al. are capable of designing a PA with 6.5 GHz BW (as reported in their paper "Analysis and design of an ultrabroad band stacked PA in CMOS technology")...
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    How come differential cascode structures affect on PA characteristics?

    Hi, thank you for your answer! Operating frequency is 2.4 GHz. Maybe they were saying that with differential architectures less current flows through the bond wires, thus, increasing power gain? As for the virtual grounds, I still got no idea on how to start understanding the statement of the...
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    [SOLVED] What's the difference between stacked and cascode configurations?

    Hi, all I saw in an article that the authors differentiate the terms stacked configuration and cascode, even though in my opinion the stacked configuration is basically a cascode configuration. Could you please help me elucidate this issue? The image available in the following link is a cut...
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    [SOLVED] How the capacitance varies as input power varies in a mmW RFIC PA?

    Hello, all I read that the input capacitance in a cascode cell varies as input power varies in a mmW RFIC. Could anyone explain me how this happens? Is it an effect of the Miller effect? Many thanks!
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    How come differential cascode structures affect on PA characteristics?

    Hello, all I was reading the paper A WLAN RF CMOS PA with Adaptative Power Cells by Taehwan Joo, Bonhoon Koo and Song-cheol Hong, and in the design topic of such paper, the authors stated that: 1) Differential structures alleviate bond wire effects and 2) To achieve sufficient gain in...
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    [Moved back]: How to determine tolerances for VT in a PVT in corner analysis?

    Hello, all Long story, short: Someone told me I should use +- 10% in suply voltage and use -40 oC to 125 oC for temperature when running PVT corner analysis. As I don't know how those magical numbers were determined, I would like to know how and why those values are used. Thanks
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    [SOLVED] [Moved]: Impact of multiplicity on RF transistors?

    Hello, all. Hope everyone's doing fine. I'm synthesizing a microwave PA @ 2.4 GHz using sub 200nm CMOS technology. I've choosen cascode topology. The upper transistor configs are: wtot = 400u/multiplicity, number of fingers = 3 and multiplicity = 9. My doubt: Is there any constraint when using...

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