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Recent content by Edward_2288

  1. E

    Programmable Duty Cycle Clk Signal

    is there any simplified version of the verilog code? I cant really understand it. thx
  2. E

    Programmable Duty Cycle Clk Signal

    Hi, I want to design a programmable duty cycle clock signal, based on 32kHz reference clock. the programmable duty cycle clock signal ha s frequency of 1kHz. the duty cycle can vary in term of 5%, i.e. 5%, 10% ... 95%. so anyone has the idea with minimum hardware constraint. thanks.if...
  3. E

    What is the best book to learn PERL in minimum time?

    Perl how about programming perl? which one is better, programming perl or learning perl. Added after 50 minutes: So, anyone has 'learning perl' from Oreilly in pdf format?
  4. E

    What is the best book to learn PERL in minimum time?

    Perl Hi, what is the best book to learn PERL in minimum time?
  5. E

    Macro Cell vs Standard Cell

    well, can you give me some examples of macro and standard cells? thanks
  6. E

    Macro Cell vs Standard Cell

    Hi, what does it mean by macro cell and standard cell? I often hear it from Astro manual. what are their differences?
  7. E

    What is a MOS differential pair ?

    MOs Differential Pair a mos differential pair is an architecture whereby two MOSFETs share common source.
  8. E

    Divider for synthesis

    what is DW divider?
  9. E

    Divider for synthesis

    so it means that in one clk cycle, we get the result of division. am i rite?
  10. E

    Divider for synthesis

    Hi...this code will be synthesized into what? how many counters? how many adders? substractors? thx
  11. E

    Divider for synthesis

    any link for verilog? btw, what is the difference between pure combinational and digit-serial divider? is it the number of cycles required to complete a division? thx
  12. E

    Divider for synthesis

    divider with quotient and remainder hi can u show me both ways? thx
  13. E

    Divider for synthesis

    combinatorial integer divider verilog anyone has the e-book or paper? actually, how many ways are they to build a divider?
  14. E

    Divider for synthesis

    dw divider hi, I encounter a problem in synthesising a divider to a gate level. for simulation, it can be simply done by using "/" symbol. however during synthesis, an error occurs. well, anybody know how to synthesis division, let say by 3, 5, 7, etc, please advise me. thx
  15. E

    How many types of SPICE are there and what are their differences?

    SPICE so how many types of spice are there? and what is the most popular one? is it hspice?why?
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