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Thanks for your reply.
I rechecked, and in the FPGA baord, the VCCIO and 3.3V is already connected. Phew, it is good news.
But I have a wrong design, I use MAX3232 for RS232, but I supply 5V for this IC. So the RX of MAX3232 is now 5V, connected to 3.3V FPGA bank. First time it is run, but now...
Hi,
I bought a FPGA from Trenz electronics and did the base board for it. The Trenz board is fit on my design, first time it is run well.
https://www.trenz-electronic.de/products/fpga-boards/trenz-electronic/te0600.html
I use Bank 0 to control our device( about 20 pins), the level logic is...
OK, you need to edit the component in the library.
Choose the component in the library, then Edit -> Set reference -> pin1.
After that, the component will locate at the design area.
Thanks,
My ADC is 14 bits, SNR = 74 dB. FFT 4096 points,scale, 16 bits .
I design in FPGA, use FFT Xilinx Coregen.
FFT data output is real and image. It is squared, added together and squared root (in FPGA). After that, all data is sent to my PC. I'm sure I receive correct data, but I don't...
Hi,
I had a FFT, data output is through is real and image. This real and image data is squared, add together and go to square root block.
After that, we have 16 bits unsigned fix point.
But in software, i don't know to convert data to dB.
Example, i transmit a -60dBm from the signal generator...
Please help me. I design a ADC circuit at 160 MSPS clock.
My circuit will operate in a high electron-magnetic, there are much noise in this envirment. I wonder about data trace layout, can i need to layout it in inner layer( in layers under top layer) ?
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