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Question about VCCIO not connected

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dathoang86

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Hi,
I bought a FPGA from Trenz electronics and did the base board for it. The Trenz board is fit on my design, first time it is run well.

https://www.trenz-electronic.de/products/fpga-boards/trenz-electronic/te0600.html

I use Bank 0 to control our device( about 20 pins), the level logic is 3.3V. But the power supply VCCIO for this Bank, I do not connect to anything( floating). ( mistake here?)

So some Trenz boards died. I'm so worry now. It is not connected to DDR block when I do the test board. May be the DDR is died.

Please guide me, what is the problem when i do not connect the VCCIO?

Thanks in advance,
Dat
 

You MUST connect a voltage to VCCIO. If you don't connect a supply voltage for your IO pins you can definitely damage the device if you apply an external voltage to the input pins. Further, how would you expect to get an output of you don't have a voltage?
 

Please guide me, what is the problem when i do not connect the VCCIO?

If any IOs from the specific bank are intended to be used - then the VCCIO to this bank MUST be connected.

If none of the bank's IOs are used and none of them have a secondary role that's vital for the FPGA's operation - then it might work...but in that case they mustn't be driven or else the FPGA will be damaged.

Either way, leaving banks unconnected is bad practice.
 

Thanks for your reply.
I rechecked, and in the FPGA baord, the VCCIO and 3.3V is already connected. Phew, it is good news.

But I have a wrong design, I use MAX3232 for RS232, but I supply 5V for this IC. So the RX of MAX3232 is now 5V, connected to 3.3V FPGA bank. First time it is run, but now some boards are died. So worry.

Now we change the supply voltage to the MAX3232 is 3.3V. It is run now. Is It ok? or we need to be done the level transfer IC?

Thanks,
Dat
 

The io pins do have some protection in the form of clamping diodes. These are able to clamp the io pad voltage to a safe level provided that you limit the current flowing into the pin by using a series resistor. That way you drop most of the voltage across this external resistor, and the io pad voltage is only 1 diode drop away from your VCCIO. And since this is a ready made dev board, I would expect something like 100 Ohm resistors on those IO's. In which case things should be okay. You can check the datasheet for that board, that way you know for sure if there is a series resistor on those IO pins.

- - - Updated - - -

And just so we don't get any confusion... With "should be okay" I mean "your board should still work", and nothing more. If you want to permanently use 5 Volt IO's then more work is required.
 

The io pins do have some protection in the form of clamping diodes.
Some vendors have it, others don't. The device of interest (Spartan 6) has configurable clamp diodes, similar to most Altera FPGAs, only active with PCI IO-standard. By nature of the configurable clamp, it's not present in the unconfigured device, thus can't be considered safe.

And as said, without a current limiting resistor, the rated diode current of 10 mA won't be kept.
 

It seems that the OP was very unclear on what they were doing in the first place and doesn't seem to understand they are not working on an FPGA design but are interfacing with an FPGA module.

The small form factor FPGA board they mention in their first post has both switch mode and linear regulators on it, which require a 3.3V input supply voltage, which the OP inadvertently connected a 5V regulator to. Therefore there shouldn't be any issue of unconnected FPGA voltage rails to any bank.

I suspect they probably damaged one or more of the SMPSs on the trenz FPGA board. If the FPGA still seems to function on the board but the DDR doesn't then the 1.5V SMPS probably died and the 1.2V SMPS is probably still working (but may die later). The linear regulators for the 2.5V might be okay, as they typically have a pretty wide input voltage range that can be tolerated (that is until the dissipated energy burns up the part)
 
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