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Recent content by corgan

  1. C

    What's wrong with the verilog code?

    Xn-1 is updated every cycle. diff is updated every cycle too. It's not necessary to put diff in the always block.
  2. C

    What's wrong with the verilog code?

    I would like to design a first order IIR high filter with equeation y[n] = x[n] - x[n-1] + a * y[n-1] I wrote the following verilog code, but the result is not correct . Can any one tell me why? input wire signed [15:0] Xn, output reg signed [16:0] Yn, parameter a = 0.9; reg signed [15:0]...
  3. C

    How to verify a decimation filter? (Emergency)

    The ADC is a sigma-delta modulator with 1bit oversampled PDM output.
  4. C

    How to verify a decimation filter? (Emergency)

    Thank you gusy for the help. The decimation filter use decimated by 16 and decimated by 4 to perform decimated by 64. Matlab can generate stimulus for each stage. But what I want to test is the result of decimated by 64. By the way, if the ADC output is a 1bit data, does it mean the decimation...
  5. C

    How to verify a decimation filter? (Emergency)

    4bit decimation filter The decimation filter is a multistage filter. Because I design each stage separately. How the testbench of the decimation filter be generated in this case?
  6. C

    How to verify a decimation filter? (Emergency)

    pdm decimation filter I design a decimation filter(in verilog) for a 1-bit oversampled sigma-delta ADC. But I don't have any idea to verify it. Could anyone give me a hand? Thanks a lot!
  7. C

    Analog gain vs digital gain..!

    I have a question about the analog gain and digital gain. For a analog singal , said it's a sine wave, ranges from -1/+1 V. An analog gain 3 makes the sine wave ranges from -3/+3V. If the analog signal is digitized with sigma-delta ADC that have 1-bit output. that means the signal become...
  8. C

    Any tools available for reading raw PCM data?

    Is there any tools avaliable for reading raw PCM data and play it so that I can test a audio ADC??
  9. C

    What does it mean when PDM signal is 75% 1s/0s density?

    What a PDM signal is 75% 1s/0s density means? PS. PDM: pulse density modulation Thanks in advance!
  10. C

    Digital decimation filter design!

    decimation filter design I need to design a decimation filter after a voiceband ADC. I'm new to digital decimation filter design, is there any document talk about how to design decimation filter or any sample code available? Thanks in advance!
  11. C

    Software debugger/ROM eumulator for ARM??

    The controller is not in production yet, there's a UART can be connect to the PC. I ask the question because I don't which IDE can debug a ARM chip without JTAG/ICE. :( Any suggestion?
  12. C

    Software debugger/ROM eumulator for ARM??

    arm rom debugger Since I don't have JTAG, can anyone tell me how to debug a chip with ARM9 inside?
  13. C

    How to calculate the required freq for H.264 decoding?

    I think it's a experiment number. Just run the software decoder in PDA to get the number.
  14. C

    processor speed choice for embeeded network application?

    In fact, we need a MCU can deal with network protocol with minimum processor speed. Can a ARM7 MCU operate at 50Mhz and intergate with ethernet MAC SOC able to do that?
  15. C

    Systemverilog supporting of design compiler..

    Doesn anyone which version of design compiler support systemverilog3.0/3.1 synthesis?
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