Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi everyone,
1. When I did a transient simulation (with an inverter design) in 32nm SOI IBM PDK, Spectre (version 6.1.3.500.14) issued the following warning:
- "Model parameter version =4.3 is not valid, reset to default model value = 3". - Then, I double checked the model version of the PDK...
Hi everyone,
I am using Cadence with CMOS10LPE IBM library (65nm).
my design needs a ROM (1K, 10bit) and a RAM (4K, 10BIT).
In order to make those ROM and ROM, I think the most straightforward way is to design their CMOS circuits, simulate them and then do layout. However, this method would...
Hi All,
I am using Cadence ADEXL version 6.1.3.5 to perform Corner Simulation with cmos10lpe.
My problem is as follows:
Typically, a library provides its users with corner sections such tt, ff, ss in order to allow them to perform corner simulation.
However, IBM cmos10lpe does not provide those...
Hi everyone,
We are using IBM 65nm cmos10lpe process.
Our design used a triple-well RF nfet (nfettw_rf). However, when we checked DRC with Calibre, the tool generated the following result:
"Triple well tie-down rule: [(T3 not over NW) touching gate] must touch RX, which is electrically...
Hi All,
Currently, I am designing a DAC for a high speed SAR ADC. In this DAC, a 2-GHz 3-input analog switch is needed (Please enlarge the below figure for more details).
Unfortunately, I failed to find any paper about switch operating at that frequency or thereabout.
I also tried with IEEE...
Hi All,
I am a newbie in analog circuit design.
The thing is that I am responsible for designing a high speed 4-input analog multiplexer ( which is also called as 4-input switch). However, I could not find any basic paper about it.
Could you please recommend me some basic papers about high...
virtuoso layout measure area
Hi all,
In Cadence Virtuoso layout editor, is there any command to measure area of a polygon or path ?
What I currently do to measure the area of a shape is that I measure length and width using ruler, then calculate its area ( Which is widthxlength for a...
1. I have a problem with using instance of NMOS Pcell in Virtuoso layout. The thing is that I could not select a specific layer (e.g PC, Metal 1, et.c) inside the instance although I can see that layer. Whenever I click on an instance's specific layer. then the whole NMOS instance is selected...
voltage reference circuits
Hi Onteri,
Thank you for you reply.
Now, It's clear to me why we need a regulator.
However, It seems to me that regulator's ouput voltage is varied with temperature change because threshold voltage and carrrier mobility of pass transistor in a typical regular is...
voltage reference vs voltage regulator
Hi All,
Could you pleas let me know the difference between voltage regulator and voltage reference circuits?
As I understand, reference voltage circuit aims to provide a voltage which is not dependent on PVT variations. And the purpose of voltage...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
