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Recent content by cetc1525

  1. C

    decrease current consumption in BJT Op Amp

    the only way is reduce the mirror's current.using high gain stage .
  2. C

    Issues when drawing a RF mixer layout

    Mixer Layout I think is the paracitic capacitor&inductor .at high frequency, a lot of thing will be met.
  3. C

    About TSMC 0.18um device model

    where did you find the models?
  4. C

    online analog circuit design study?

    go to berkeley's websit.
  5. C

    How do you simulate the start up circuit for a bandgap?

    Bandgap Design I think the simulate of startup is not nessary.for you can judge it by hand.I think the stable of the circuit is important.
  6. C

    Help me with biasing of npn push-poll stage

    push-poll stage I think the structure in opamp will be useful.
  7. C

    How do I minmise the Vgs drop across the Mosfet?

    sooch cascode use a cascode structure,the different w/l& you can reduce the vgs.
  8. C

    Analog Design Automation: Neocircuit

    Analog Design Automation I just know there is a software can auto layout the analog circuit.it can layout the symmetric device that used to be by hand.
  9. C

    Does Window ME or Window XP support star hspice 2000.2?

    I think win2k is the most suitable system for simulate.
  10. C

    Schematic Entry Tools

    schematic entry tools how about syn's dc?
  11. C

    Most complete schematic entry tool list

    schematic entry tool I think cadence Ic5033&mentor' eldo is also the product.
  12. C

    Book about Layout design

    the art of layout is a suitable book for analog designer.

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