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Recent content by benchen

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    Help: how to get 12GHz VCO with differential outputs?

    I am designing a test PCB. Differential LO signals at 12GHz are needed. I searched some IC products. The VCO can only generate single output at 12GHz. Anybody knows where can I find VCO with differential outputs at 12GHz, or other solutions? Thanks.
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    What's the role of the resistor usded in a inveter?

    Thanks. When should we use the inverter with resistor?
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    who can help me explain this problem!

    I think if there is no match problem or channel modulation cosideration, use the smallest L.
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    What's the role of the resistor usded in a inveter?

    Some inveter have a resistor between its input and output? I wonder what is this resistor for? to stablize the DC level? In which case should we use this kind of inverter instead of the convertional one? Thanks
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    What kind of delay is needed to eliminate the dead zone effect in PFD?

    I know to eleminate the effect of dead zone in PFD, delay module is intentionally added. My question is how long should this delay be? Is there any priciple about that? The CP needs some time to reach its stable current. So should this delay be long enough to wait for the CP to be stable or just...
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    help: calibre problem!!

    The type of the extracted parasitic cap from layout should be pcapacitor. But now the parasitic cap of the calibre is mimcap and always with the same width and length( 10um). Is there any setup probelem? thanks.
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    a question about power gain.

    For the MOSfet, the input impedence at gate is infinite at low frequency. So how to calculate its input power? should it be zero? in this case, what is the power gain? infinite?
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    Why can't we do quatrature upconversion in digital circuit?

    I am confused by this. I found most of the diagram of transmitter does the quatrature upconversion in analog domain. And this will cause I Q mismatch. Why do't we do this in digital domain? for example, upconvert the IQ signal to a low IF and add them together in digital domain and then DAC and...
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    Problems of using the "dft" function of caculator

    Re: Problems of using the "dft" function of cacula refer to this paper.
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    Analog switch which can function if its control voltage is less than input

    Re: analog Switch in this paper, a bootstrap switch is presented, hope it can help
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    Problem with pipeline ADC harmonics

    Re: About pipelian ADC! I think Fin and Fsample shoudl satisfy: fIN / fSAMPLE = NWINDOW / NRECORD, fIN: Periodic input signal fSAMPLE: Sampling/clock frequency of the ADC under test NWINDOW: Integer number of cycles1 within the sampling window, prime number NRECORD: Number of data points in the...
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    biasing differential amplifier

    Re: biasing analog IC I think you can find the answer in Gray's book
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    Who is your analog IC design engineer heroes (update)?

    I like razavi for his book is good for understanding.
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    Help,Something about the Delta Sigma Modulator

    You can refer to "Delta Sigma Modulation in RF Transmitters with emphasis on fractional-N frequency synthesis" Phd Thesis by Thomas Stichelbout , 21 June 2000 which can be found in E-book of this forum
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    Help! how to test the DC offset of a comparator?

    I know how to simulate the DC offset of a comparator. But how to test it with real chip? should I generator the two input signals with two signal generators? I doubt if I can clarify the small voltage difference( such as 0.5mV) between two input signals? Can someone tell me the right way to...

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