Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I am designing a test PCB. Differential LO signals at 12GHz are needed.
I searched some IC products. The VCO can only generate single output at 12GHz.
Anybody knows where can I find VCO with differential outputs at 12GHz, or other
solutions?
Thanks.
Some inveter have a resistor between its input and output? I wonder what is this resistor for? to stablize the DC level? In which case should we use this kind of inverter instead of the convertional one?
Thanks
I know to eleminate the effect of dead zone in PFD, delay module is intentionally added. My question is how long should this delay be? Is there any priciple about that?
The CP needs some time to reach its stable current. So should this delay be long enough to wait for the CP to be stable or just...
The type of the extracted parasitic cap from layout should be pcapacitor. But now the parasitic cap of the calibre is mimcap and always with the same width and length( 10um). Is there any setup probelem?
thanks.
For the MOSfet, the input impedence at gate is infinite at low frequency. So how to calculate its input power? should it be zero? in this case, what is the power gain? infinite?
I am confused by this. I found most of the diagram of transmitter does the quatrature upconversion in analog domain. And this will cause I Q mismatch. Why do't we do this in digital domain? for example, upconvert the IQ signal to a low IF and add them together in digital domain and then DAC and...
Re: About pipelian ADC!
I think Fin and Fsample shoudl satisfy:
fIN / fSAMPLE = NWINDOW / NRECORD,
fIN: Periodic input signal
fSAMPLE: Sampling/clock frequency of the ADC under test
NWINDOW: Integer number of cycles1 within the sampling window, prime number
NRECORD: Number of data points in the...
You can refer to "Delta Sigma Modulation in RF Transmitters with emphasis on fractional-N frequency synthesis"
Phd Thesis by Thomas Stichelbout , 21 June 2000
which can be found in E-book of this forum
I know how to simulate the DC offset of a comparator. But how to test it with real chip?
should I generator the two input signals with two signal generators? I doubt if I can clarify the small voltage difference( such as 0.5mV) between two input signals?
Can someone tell me the right way to...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.