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Help! how to test the DC offset of a comparator?

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benchen

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I know how to simulate the DC offset of a comparator. But how to test it with real chip?
should I generator the two input signals with two signal generators? I doubt if I can clarify the small voltage difference( such as 0.5mV) between two input signals?
Can someone tell me the right way to test the DC offset?
Thanks.
 

For process variety , you use Mote Calo analysis . For offset caused by
design topo, you make a DC sweep and find the voltage of input diff signal ,and
u findd the offset voltage
 

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