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Hi
I have imported my digital design of standard cells into cadence ICFb tool as schematics. I want to run simulation on the schematics in ADE. How can I provide global power supply to the VCC,VDD pins of standard cells as these power pins are not visible in symbol of std cells in the...
Hi
I have a digital block with standard cells that I want to add to analog block and run simulations in the cadence ICFB “analog environment”.
I can successfully import the schematics in the cadence composer as the symbols of std cells are available from foundry. However, the symbols appear as...
Hi Cop02ia
Thanks for the info.
As per your suggestion, I removed "IOpower" & "IOground" global connects.
I abutted the pads together by inserting IOfillers.
I only used "power" & "ground" global connects for core power.
On doing Sroute, core power routing passes as earlier, but still I get...
FYI, first I use GlobalConnect to associate
1. power net with core power pad pin
2. power net with std cell power pin
Then I do sroute, which gives the warning for unable to create pad ring for IO power pad.
Also, in .lef file, IO pads do not have power pins.
Kindly help in correctly doing...
Hi
For our ASIC, we have a set of core power pads that supply 1.8v to core area and another set of IO power pads that supply 3.3vto IO pads.
We are able to do successful Sroute to connect std_cells VCC& GND to core power/ground nets and to the COre power pad pins.
However, when I do sroute...
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