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Re: gate oxide
m...
Another thing difference.
To prevent field oxide parasitic leakage path, channel stop implant is always used, which is opposite to thin oxide.
input offset folded cascode amp
mm...
I think Razavi' book is very clear, reference the chapter about nonlinearity and match.
For folded cascode, the offset are mainly from input pairs and active current source.
In spice, MOS parameter "delvto" can be used to do op offset simulation.
You can reference Razavi's book chapter13 to estimate your mos Vth offset, then apply it to delvto at every MOS. Monte-Carlo simulation then can be done.
It is a easy way for me to roughly determine your MOS size in OP for...
Re: slew rate vs gm
I don't understand why settling time is inversely proportioal to slew rate.
Setting time is a small signal behavior, and slew rate is large signal.
Could you explain it more detail?
Thank you
replica bias vco
replica bias circuit is always been uesd at sensitive analog circuit, like VCO.
Because it can meet good match properity for bias circuit and circuit been biased.
Re: How to improve reference buffer transient load regulatio
Sorry, If my picture is not clear
Vtl is a voltage source of "0" to "Vsupply" swing, and Vi=0.5*Vsupply. Then It means the buffer need to source or sink current I=(0.5*Vsupply)/R when Vtl change its polarity.
Added after 23...
how to improve load regulation
Hi all
When I design a buffer for voltage reference
There is a spec called transient load regulation
Its test circuit is as picture
Vin="Vsupply/2"; and Vtl transient from "Vsupply" to "0" and "0" to "Vsupply" within 0.1usec. Then I can...
Thanks all
I need to modify the circuit more clear
Added after 23 minutes:
As I know, M1,M2,M3,M4, and M5 are error amplifier to sense the difference of Vds7 and Vds8, and feedback to Vrsup
But I have another question, what is the role of M17?
high psrr bandgap
Dear all
I have some question about this bandgap, which is reference from "A Supply-Noise-Insensitive CMOS PLL With a Voltage Regulator Using DC-DC Capacitive Convertor" by Chang-Hyeon Lee,..
In this paper, no detail description about how it works, and only mention RC...
I have a question
Anyone use NMOS as MOSC application in 2-stage OP miller compensation?
It's p-sub bulk always at VSS, but it's source and drain connected to OP output terminal. This OP is used as output buffer, so the output voltage may vary from near-vss to near-vdd.
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