Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I think the most important idea behind this comes from the system we are working on.
They are at first linear systems.
In my opinion , the linear systems do two things:(suppose the input signal is x(t) the output signal is y(t))
1.
It multiply a coefficient by the value of the signal at every...
hey,moonnightingale
here's my answer , I hope it can be helpful.
As the nmos is in the "Saturation Region" and the current source is a dc source, it means:
Id=0.5 * Un * Cox * (w/L) * (Vgs-Vth)^2 * (1+λVds)
and here ,Vgs=Vds :
Id=0.5 * Un * Cox * (w/L) * (Vds-Vth)^2 * (1+λVds)
the right part of...
dear LvW,
thank you very much .
It's very kind of you .
Your second comment is very helpful.
As for the DC operation , the resistance has something to do with the exact point rather than the derivative.
And thank you for the supplement too.
Actually I know the fact in this aspect, but I just...
Dear, all.
I don't quite understand what "Saturation" means for a BJT and a MOSFET.
So I Searched on the internet and wikipedia says,
"Saturated transistor, a BJT transistor or field-effect transistor that is fully turned on."
So I suppose that a fully turned ON transistor is saturated.
But...
Hello,pavel_adameyk
Could you explain it in more details?
Is the key point the HIGH GAIN?
if the upper MOSFET is diode connected,will the output be well-defined?
Maybe I don't quite understand what "well-defined" means.
thank you very much.
Best wishes to you.
The book says ,
the DC output level is not well-defined.
When the DC voltages of Vb,Vin and Vdd are defined,
I think if I have the equations for Id of the two MOSFETS equal,
I can have a solution for Vout.
If so, Vout shouldn't be not well-defined.
could anyone explain this to me?
Thank you...
I saw this circuit in Razavi's book ——"Design of Analog CMOS integrated Circuits"
I don't understand his analysis.
the book says
the gain is:
It seems when considering the Small signal model
the Dependent Current Sourse is gone.
I think it should be like this:
Say , a quarter of the book's...
sorry for reposting this here.
I have just posted this in " Mathematics & physics"
But I think guys here may be more familiar with this.
***********
Hey guys.
I met a problem when derivating the Shockley equation.
a few steps before I finally get the Shockley equation , I met the Equation...
thanks all above.
And I'm sorry..
I misunderstood what my friend meant..
He meant:
is it possible to build a divider-by 5 15% duty cycle?
is there anyone who know about sth this?
best regards..
hey,divider-by 5 15% duty cycle ,possible?
hi ,all..
build a divider-by 5 30% duty cycle ,possible?
My friend asked me about this..
He thinks this is impossible..
I wonder if there's someone here can do it with some special ways?
Best regards.
updated:
thanks the two kind guys below..
but I...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
