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Recent content by alasliu

  1. A

    question about low power LDO

    no Added after 4 minutes: please giveme some advice thank you
  2. A

    question about low power LDO

    thanks LDO used in soc 0-20mA transient response dip< 50m PSRR > 40dB at 1M about 1uF ceramic cap Added after 59 minutes: have used PMOS
  3. A

    question about low power LDO

    dear all i want to design a low power LDO. but i dont know which structure to use. thank you
  4. A

    How to avoid unwanted comparator switching of flash ADC comparator?

    basic adc comparator why use flash you are low speed.6 bit should be no problem.but according to PSRR
  5. A

    How to eliminate noise in MOSFET?

    NOISE in MOSFET? flick noise is important at mixed-signal systemaliased around clock frequency.
  6. A

    Low current increase the noise

    input pairs thermal noise is 4kTr/gm. so if you increase current, gm ascend. thermal noise will be reduced.
  7. A

    how does the vth affect the gm of nmos differential pairs?

    vt vth nmos do you have schematic, i think maybe tail current change.
  8. A

    bandgap important problem

    1 how to improve PSRR for bandgap using OP 2 if resistor ratio is not integer, how to do layout. for example ratio is 11.2
  9. A

    ac/dc converter power supply

    hard to do it

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