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Recent content by Alaa El-Din Mohamed

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    ModelSim

    Hi :) I have just added delays for the gates used in my design e.g. " and #(1,2,3)(c,a,b); " . The question is how can I run the simulation such that it considers the minimum delay of the gates? Thanks in advance :)
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    Verilog HDL-Gate level design

    Thanks for your concern, imbichie :) . The problem was due to opposing inputs and outputs of one module. And I shall use the safe form of instantiating any module as module ****( .o(output) , .i1(first input) ,....... )
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    Gate level design

    Hi :) I've started learning Verilog HDL for a while. Now, I'm studying gate level design. I wrote a module which ran normally in its test bench but when I further used it in another module something went wrong. The wrong thing is that I have a nand gate (in a module)whose inputs are {0 , 0}...
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    Verilog HDL-Gate level design

    sorry, ads-ee. I didn't get your answer. But as an information, the output of this nand gate is connected directly to another nand only.
  5. A

    Verilog HDL-Gate level design

    Hi :) I've started learning Verilog HDL for a while. Now, I'm studying gate level design. I wrote a module which ran normally in its test bench but when I further used it in another module something went wrong. The wrong thing is that I have a nand gate (in a module)whose inputs are {0 , 0}...
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    Multi-standard Multi-band Transmitter

    Do you know any text books discussing System level design of RF Transmitters? I found chapter 4 in "RF Microelectronics, 2nd ed. by Razavi " but I want more or is it enough?
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    Multi-standard Multi-band Transmitter

    Hi :) My work team are responsible for designing Multi-standard Multi-band (GPS, GSM, Bluetooth and WiFi) Transmitter. Could you help me concerning where to start from (text books or so) as it's our first time for designing any TRx. In other words, How to get theoretical background to be able...
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