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Recent content by ac123

  1. A

    What does hot carrier check mean ??

    Hot carrier check? Hi all, What do you mean hot carrier check? Which stage of physical design is this check done? Thanks ac123
  2. A

    How to report TNS in PT?

    pt. tns Hi , How do I get an idea about TNS in prime time?
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    can i see the contents of .tch file without .ict file ??

    qrctechfile Hi, I have a .tch file which i use for extraction using qrc. I understand that .tch file is a binary file created from .ict file using techgen. I dont have the .ict file from me. Is there any way I can see the contents of the the .tch file?? (similiar to libgen -ls showing the...
  4. A

    Can anyone please explain the syntax of SPEF?

    site:www.edaboard.com spef syntax Hi all, Can anyone please explain the syntax of SPEF? Some sections of the spef ( for example *CAP) is blank for some particular nets. I am debugging on this issue. Has anyone faced this kind of issue before?
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    Question about r and f for cell delay in PT report

    Re: Reg: PT hi, I am also new to PT. But let me share what I think about your questions r means the transition from 0->1 and f means 1->0. Depending on the nature of the pin it can be either input or output transition. For a clock pin it will be the input transition and for a Q pin it is the...
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    What is the difference between HFN and CTS?

    Re: HFN and CTS scan enable is another example for High fanout net. Some of the P&R tools are intelligent enough to detect the high fanout nets during placement optimisation (based on the threshold given for no: of nets) and do HFN synthesis.
  7. A

    Software for doing timing closure

    Re: Timing closure Hi I heard that Cadence has something called Encounter Timing System (ETS) which is a dedicated tool for STA like primetime from synopsys.
  8. A

    What is the setup and hold time?

    setup and hold timing hi nikhilindia85 sorry i couldnt understand which pdf you are referring. I cant see any pdf attachment in your post.
  9. A

    How Positive Skew effects frequency

    guys can you please explain what is meant by positive skew? Skew is the difference between time taken for the clock to reach two sequential element. Is this understanding correct?
  10. A

    what is physical meant?? clearance

    Being a physical design team member means one should know all these. :D
  11. A

    What is the clock jitter and how does it occur?

    Re: clock jitter Clock Jitter is the variation in clock period. I dont know the exact reason. I think its due to the error of the clock source (PLL etc..)
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    what is the difference between Star_RC,Star_RCXT and StarDC?

    Re: what is the difference between Star_RC,Star_RCXT and Sta Hi, I understand that 2.5D extraction is more accurate and more preferred than 2D extraction. I also heard that there is a 3D extraction too.. But wht is exactly the difference between these 2D and 2.5D? What all values are not...
  13. A

    What is the setup and hold time?

    setup hold time hi, I heard somewhere that the setup check is done with the next active edge but the hold check with the current edge itself..Is it so? If yes, why?
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