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Recent content by ABO_ATHAB

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    [SOLVED] Differential Manchester::need to help to change my code

    but you are going to need a clock at twice the speed of your target data rate to create the data yes this is the solution the fpga from xilnix only work on rising edge and differential manchester code change the output at rising and falling of clk so the solution is to make the clock speed...
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    [SOLVED] Differential Manchester::need to help to change my code

    hi i try to build Differential Manchester(https://en.wikipedia.org/wiki/Differential_Manchester_encoding) by use vhdl this is my code but is not synthesizable:-? i need to be synthesizable best regards library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_logic_arith.all; entity...
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    [SOLVED] one system,tow different frequency,many process need some help in tinming analysis

    Ok ......... :-d
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    [SOLVED] one system,tow different frequency,many process need some help in tinming analysis

    if they are synchronous they do not need to be in the sensitivity lists. all process have the following sentence if(clk3M; event and clk3M='1') or if(clk15MHZ; event and clk150MHZ='1') is this mean that the synchronous??
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    [SOLVED] one system,tow different frequency,many process need some help in tinming analysis

    hi i have implement this system contain three part as shown below in vhdl as follow dcm genertate two freq synchronization:process(CLK3M) part1:process(CLK3M,signals) part2:process(CLK150MH,signal) part3:process(CLK3Mhz,signal) can anyone give me some time analysis any warning ,any...
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    [SOLVED] rising_edge() of switch....can we

    thank sureshaa all to all how suggest the solution
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    [SOLVED] rising_edge() of switch....can we

    thank for all for suggestion but is thier a vhdl code for this words """"It would be much better to have a system clock and a synchroniser on your switch (ie, sample the switch with the clock through a double register) and then do a rising edge detect on that.???"""
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    [SOLVED] rising_edge() of switch....can we

    helloow can we use rising_edge() and falling_edge() functions to detect rising_edge of the switch in spartan 3E ?? if not is their any method?? regards m.s
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    vhdl code for division of two fixed point numbers

    LOOK TO THIS WEB AMAZING https://vhdlguru.blogspot.com/2010/03/fixed-point-operations-in-vhdl-tutorial.html
  10. A

    idea for dual edge Linear_feedback_shift_register

    thank you allot - - - Updated - - - ------------------------- dear mrflibble: i did not know what can i say to you, but their is a simple word that describe you replay ====================== AMAZING ++++++++++++++++++++++...
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    vhdl code for division of two fixed point numbers

    hi ammassk you can use fixed ponit library provided by bishop search it on google and will get many result regards
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    idea for dual edge Linear_feedback_shift_register

    dear mrflibble this is an idea to implement the LFSR and this is a simple code i made it 4 bit LfSR like the counter code this code is complete and this a simulink library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity lfsr is...
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    idea for dual edge Linear_feedback_shift_register

    mrflibble : The general idea is, did you actually read the thread? FvM's last post pretty much sums it up. So how are you planning to transpose that trick to the lfsr problem domain? What's that you say? eehhrrr, uhm, welllllll? exactly. i am not a professional in vhdl and just a beginner so...
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    idea for dual edge Linear_feedback_shift_register

    hi every one today during trying implement dual edge counter i find this post https://www.edaboard.com/threads/133082/ one of the member add code that work very well , here is the simulink https://obrazki.elektroda.pl/98_1289953468.gif can any one help ous and post code or share idea for...
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    [SOLVED] use dcm to increase frequency in spartan 3e

    ok thank you
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