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Recent content by abhaykochhar2

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    X-Terminal tools for windows

    I understand this post is very old now.. but I am facing very serious problem with AstecX with Cadence in Windows7 environment. All goes well till the cadence initialization & schematic window but as soon as the Analog DEsign environment is started, all menu bars of the cadence environment even...
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    how to calculate temp coeff of band gap reference..

    hii.. how to calculate temp coeff of non linear expression as in case of band gap reference... we get non linear graph of a voltage reference... then i took differentiation of it with respect to temperature with the help of synopsys calculator... now hw to proceed for calculating it temp...
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    Are there any Op-Amp test standards...

    Hi all. Are there any Op-Amp Test standards for simulation purpose... I have Op-Amp Ready in some process,... I hv checked its ICMR, AC analysis, Transient... How many different analysis can be done after this?? I dont know about Pole-Zero Analysis... where it is useful.. Please clear all my...
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    how to simulate the startup circuit for bandgap reference?

    Re: how to simulate the startup circuit for bandgap referenc what is STP or PDB signals??? does it comes in .options of simulator? i m using hspice.. so do i have this option.. i hv searched but didnt find any.. help me out in this.. thnks in advance...
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    regarding offset error......

    CAESER: how do u designed subtractor?? a dc subtractor??
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    how to simualte CMRR for diffrential amp?

    plot/calculation of COMMON MODE RANGE in Synopsys?? how to plot INPUT COMMMON MODE RANGE in HSPICe.. i hv read that document.. it is asking for DC + AC Analsyis... does this avail in Synopsys tool.. help me out..
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    how to compile BSIM model

    can we compile at hspice or other simulator... if u can try it pls let me know the steps in readme text file..
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    how to compile BSIM model

    how to compile BSIM model given in h**p://www-device.eecs.berkeley.edu/~bsim3/get.html they have given C and Header files.. has anyone compiled those....
  9. A

    How BJT is formed in CMOS process??

    read weste eshraghian book or Sorab K Ghandi...
  10. A

    where i can get bjt model files??

    does neone know where can i get bjt model files for HSPICE ?? also bjt and resistor model files for MENTOR TOOLS???
  11. A

    Why the power consumption of cmos is low?

    Re: cmos thats a perfect answer.. try to read some topics from CMOS VLSI Design from Weste HARRIS.... u will understand it in better way...
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    How to use available models in VHDL-AMS

    yes its true.. Discovery AMS is for this vhdl-ams only.. try www.synopsys.com/products... or simply u write ur code in .va format.. and u can simulate using HSPICE.. HSPICE simulates verilog A format files... try it out.. let me know also.. i m also started now only.. i m beginner in this ...
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    How to use available models in VHDL-AMS

    synopsys does support vhdl-ams.. DISCOVERY AMS is by synopsys only.. but can we use our model files for further designing??
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    How to use available models in VHDL-AMS

    hi all. how can we use available models in VHDL-AMS.. as this facility is available in MAST.. is the same facility available in VHDL-AMS?? waiting for ur replies.. regards... ASCII
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    How to caculate by hand using BSIM3v3 Model parameter

    cox bsim3v3 hii.. i would like to ask one question.. how we can use readymade models like BSIM, MOS (Philips), etc models in VHDL-AMS tool of synopys??? waiting for ur replies...
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