Why the size of inverters in buffer design gradually increases?

[sareene]

Hi ,
Why the size of inverters in buffer design gradually increased? Why not give the output of a circuit to one large inverter?

 

[Amruth]

Re: Buffer design

that cocept is called as Gate sizing.

if we place one large cell it consumes high power. and u ll get tansition violations..etc

 

[ljxpjpjljx]

Re: Buffer design

yes, you should consider the drive strength!

 

[MarcS]

Re: Buffer design

I don't understand the question. Are you talking about designing an individual buffer? Are you asking about how the range of drive strengths of buffers in a cell library? Are you talking about the use of buffers to meet timing on a path? The output of what circuit?

Please clarify what you are asking.

 

[Old Nick]

Re: Buffer design

Gate capacitance.

One large transistor pair would ahve a large gate capacitance, and the weakly driven signal would have trouble driving it. this is why we use a chain of devides with increasing dimentions.

 

[eexuke]

Buffer design

So the best practise is to increase buffer size gradually, x4 at a stage. Books on logic effort proves this