why nmos passes weak 1? why are Ids and Vs curves linear to Vg in this circuit?

[tejainece]

hi everyone,
I wanted to know why nmos produces weak 1. So I built this circuit in pspice,

**broken link removed**

and swept the input voltage from 0 to 5 volts with 100mV increment. And this is the output plot,

**broken link removed**

In this graph, the yellow curve(Vgs) is constant(equal to Vth) after Vgs>Vth. I understand that it is because source voltage increases with increase in gate voltage. but what i don't understand is why are Ids(green curve in upper plot) and Vs or Vout(red curve) increasing linearly with gate voltage(green curve in lower plot).

From what I understand, the nmos is in saturation. Since Vds is always greater than Vgs-Vth(from yellow curve). Then Ids should be proportional to square of Vgs right???

Can anyone please tell which part i am missing.

P.S Vth is 2.81V

Thanks.

 

[checkmate]

Go read up on source degeneration.

 

[john blue]

you need a high logic to on the nmos, and mosfet works when Vgs > 0 or Vgs < 0.

 

[keith1200rs]

What you have is a source follower. The transistor is not in saturation. The transition from ohmic to saturation is not abrupt. Similarly the transition from sub-threshold operation is not abrupt, Around vt there is a grey area where you move from one mode to the other. I am sure there should be a better answer but I would say you are bordering on sub-threshold operation. To ensure you were working in saturation you would normally want Vgs to exceed Vt by 100mV for example, to ensure you are away from the transition region.

Any better (i.e. more accurate) explanations welcome!

Keith

 

[tejainece]

thanks for all your replies. i was able to understand it now. keith, your reply was more clear. i found a better explanation in page no. 66 razavi book under source follower topic.

i wrote a small article on this. if you find something wrong with that article let me know.

why nmos exhibits strong 0 and weak 1 « Geek Went Freak!

thanks