Who have seen such layout?

[staric]

The layout is drawn in the picture. The yellow area is Gate. The wide wire area are active area. And from layout, the active area of Drain and Source aren't seem to connect. I cannot sure the picture is correct. But I have not seen this layout. Who can tell me the functional of this device? And its advantage?

 

[piao]

This should be a HV mos transistor, when the voltage is high, the transistor is turn on, the channel will shaped.

 

[Nobody]

It avoid the high density eletric field in one side by extend the drain LDD. Look chap12 of "The art of analog layout " . You can find this book easily in this forum .

 

[just4you]

This is a highvoltage transistor (LDMOS). The highvoltage capability is build of the extention of a well from the drain side of the transistor and by increasing the channel resistance.

 

[duron999]

High voltage Transistor

 

[gqxfw]

I think also it is a High voltage Transistor

 

[rajesh13]

Yes, this is LDMOS. As you can see that the drain is not overlapping with the gate. Some series resistor is there with the channel.

 

[Colbhaidh]

This might help visualise the LDMOS

 

[rambus_ddr]

I don't think it is a HV MOS, because the source (or drain) is not under poly. So the on channel is not created. I think it maybe a ESD protect MOS.

 

[Colbhaidh]

This is definitely an LDMOS transistor. What is missing is the N-Well beneath the isolation - see cross section posted earlier.

 

[coluga]

LDMOS

 

[rambus_ddr]

How does it became 'ON'?

 

[chun_hung86]

what is LDMOS? who can tell me, thx.

 

[okguy]

Detailled information maybe found in this book :
"High Voltage Devices and Circuits in Standard Cmos Technologies"
by Hussein Ballan, Michel Declercq
http://www.wkap.nl/prod/b/0-7923-8234-X
http://www.amazon.com/exec/obidos/tg/detail/-/079238234X/103-9712961-0986269?v=glance&vi=contents

 

[sunking]

It should be a HVMOS.

Most LDMOS is drawn as a circle or something like it

 

[r23718]

seen that as ESD on output buffer

 

[roadz]

I think this is an ESD transistor.

 

[zx2051]

why the contact size are not same ?

 

[leo_o2]

Yes. It should be a unsymmetrical HV MOS. Left will be source and right will be drain that will sustain the high voltage.
ESD devices only need unsymmetrical space for drain and source but no need for diff.