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[SOLVED] What's the FPGA technology status for y = x ^ (1/N) (N is limited range floating)

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legendbb

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Without having any floating point processing unit in a CPU per say.

I can only imagine of using LUTs to provide limited resolution.

Are there any better technology?

Thanks,

8-O
 

Have you considered a DSP soft core?
 

Have you considered a DSP soft core?

"DSP soft core" is it, floating point processing unit in a soft core CPU like MicroBlaze?
If so, I am afraid of it's out of consideration, since I need deterministic latency.
 

FPGA vendors have log() and exp() floating point IP with single or double accuracy. They should work for the application. I expect that they are using some kind of "hybrid" algorithm, combination of tables with interpolation and separate handling of exponents.
 
FPGA vendors have log() and exp() floating point IP with single or double accuracy. They should work for the application. I expect that they are using some kind of "hybrid" algorithm, combination of tables with interpolation and separate handling of exponents.
Thanks for your comment, I think you hit the point right on.
 

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