kaushikrvs
Member level 5
can we select an adder we want to use in particular or should we design it?
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@ThisIsNotSam
Synthesis will not infer an adder if synthesis tool is not aware of any library that has adders. In the absence of an adder library, Synthesis will just create gate netlist ( consisting of AND, OR, XOR gates etc) that will achieve the functionality of an adder
@ThisIsNotSam
Please provide a proof of your claim. I hope you understand that we are talking about ASIC synthesis and not FPGA synthesis as we are in ASIC forum.