Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
spice tools (hspice,spectre,...) are vector based , Not Static Timing (i.e vectorless) like Primetime. hence transistor level spice timing verification is only as good as the vectors that u use . to catch 100% timing violations , u need to use an transistor level STA tool (similar to primetime which is a gatelevel STA tool )
some Transistor Level Static Timing analysis (STA) tools are
- Accucore from Simucad (previoulsy called Smartcore/Dynacore)
- Pathmill (old) from synopsys
- Nanotime (New) from Synopsys
Big companies like Intel and IBM have their own internal tools (i guess IBM's timing tool is called Einsteineer).
so, if we use nanotime to analyze a custom block which is composed of many transistor groups (working as nor/nand/xor/...), can nanotime output a timing library for each group? (cell nor / cell nana / cell xor?) if so, can the output library be used in PrimeTime?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
