What to use for designing a 500 Mbps QPSK modulator

[ahmer saeed]

QPSK modulator

I want to design 500Mbps QPSK modulator. What should I use for design either DSP processors. FPGA or any other idea you have. PLease guide me.

 

[Aormon]

QPSK modulator

a touph task! could u tell me ,which channel codec
algorithm u will implement and any equalization
method will be taken?
BR
aormon

 

[yeewang]

QPSK modulator

500Mbps????
almost mission impossible considering the channel equalization, error-correction code and etc.
Hey, man, is that practical to have a 500Mbps qpsk?

 

[spweda]

Re: QPSK modulator

It is possible for 500Mbps depending on the channel condition.

 

[ahmer saeed]

Re: QPSK modulator

What do you think? What maximum data rate is easily achieveable in QPSK modulation. Our target is of 500 Mbps but we can compensate. What do you think?Is 300 Mbps could easily be acheived?

 

[ye.hui]

Re: QPSK modulator

you can evaluate how many MIPS the design needs to process data if you use DSP processor. i think it is not economical to implementate in DSP.

 

[LOSTINCITY]

QPSK modulator

Terriable , as i known , the demoulator is much more complex .In satellite communication the highest rate is 800mbps

 

[cat_basilio]

Re: QPSK modulator

You can design 500Mbps QPSK modulator with FPGA

 

[van_gift]

QPSK modulator

terrible, possible for wire, almost impossible for radio

 

[Wacko2000]

Re: QPSK modulator

Why should you desire to operate the signal processing for the QPSK modulator at 500 MHz?
More important to know before answering your question is what is the maximum symbolrate you try to achieve? Symbolrate and occupied spectrum are related. The only reason why you should try to run at 500 MHz is when you want to implement the DDS into your design and want to generate your spectrum to approx 250 MHz and below. However, there should be other ways which are easier to do. Personally given the processing power of current FPGA's and the required signal processing you have to do it will be impossible to accomplish this task in an FPGA.
Try to relax your design goals. I have made a QPSK modulator baseband design which runs at 100+ MHz. That is more realistic.

Regards

Added after 4 minutes:

By the way, a follow up to one of your questions... you asked for DSP or FPGA.
Believe me... don't use software DSP's for this task. DSP's are nice for flexibility but lot of tasks are performed in a serial manner.
For fast signal processing you need parallel processing which can be done with FPGA's... Altough I doubt if you can use such complex processing at 500 MHz.
And if you can do it at these clock speeds, then it will require a lot of pipelining and therefore large FPGA designs...

Regards

 

[lincoln123]

Re: QPSK modulator

I think you should think about good analog-to-digital integration