What is velocity saturation effect? How it is related to IC layouts?

[dipak.rf]

What is velocity saturation effect? How it is related to IC layouts?

Thanks in advance
Dipak

 

[jogladik]

velocity saturation effect

Hot Carrier Effects. Reading: Chapter 9. EE231 – Vivek Subramanian. Slide 4-2. Why do we care about hot electron effects? ...
organics.eecs.berkeley.edu/~viveks/ee231/lectures/section4p4.pdf
________________________HOT-CARRIER RELIABILITY SIMULATION IN AGGRESSIVELY SCALED MOS
TRANSISTORS
By
Manish P. Pagey
Dissertation
Submitted to the Faculty of the
Graduate School of Vanderbilt University
in partial fulfillment of the requirements
for the degree of
DOCTOR OF PHILOSOPHY
in
Electrical Engineering
December , 2003
Nashville, Tennessee
Approved:
Ronald D. Schrimpf, Chair
Kenneth F. Galloway, Chair
Robert A. Weller
Sokrates T. Pantelides
Lloyd W. Massengill

Added after 7 minutes:

Thin Gate Oxide Device PMOS HCI Reliability and NBTI
Effect Correlation-
Fudan-zhouke.doc -
- in google seach/
_______________
Turk J Elec Engin, VOL.14, NO.3 2006, c
T¨UB˙ITAK
Statistical Model of Hot-Carrier Degradation and
Lifetime Prediction for P-MOS Transistors
Fırat KAC¸AR1, Ayten KUNTMAN1, Hakan KUNTMAN2
1Electrical and Electronics Engineering Department, Engineering Faculty,
˙Istanbul University, 34320, Avcılar, ˙Istanbul-TURKEY
2Electronics and Communication Engineering Department, Faculty of Electrical and
Electronics Engineering, ˙Istanbul Technical University,
34469, Maslak, ˙Istanbul-TURKEY
e-mail: fkacar@istanbul.edu.tr -akun tman@istanbul.edu.tr -kun tman@ehb.itu.edu.tr

Added after 3 minutes:

Mat. Res. Soc. Symp. Proc. Vol. 811 © 2004 Materials Research Society
Electrical modeling and simulation of nanoscale MOS devices with a
high-permittivity dielectric gate stack
J.L. Autran1, D. Munteanu, M. Houssa2, M. Bescond, X. Garros3, C. Leroux3
Laboratoire Matériaux et Microélectronique de Provence – L2MP (UMR CNRS 6137), Bâtiment
IRPHE, BP 146, 49 rue Joliot Curie, F-13384 Marseille Cedex 13, France
1 also with Institut Universitaire de France (IUF) – Corresponding author (autran@l2mp.fr)
2 IMEC, Kapeldreef 75, B-3001 Leuven, Belgium
3 CEA-LETI, 17 avenue des Martyrs, BP 85X, F-30854 Grenoble Cedex 1

Added after 6 minutes:

CSSER 99_Schroder.ppt
_______________________
velocity saturation - S. M. Sze. Physics of Semiconductor Devices Second Edition A Willey-Interscience Publication Jon Wiley &Sons N. Y. ... 1981/

Added after 6 minutes:

EE 316 / Prof. Saraswat Handout 5
MOS TRANSISTOR REVIEW
file - MOSFET_Handout5.pdf
__________________________
+! velocity saturation temperature dependence.
_____________________________________http://www.lib.umd.edu/drum/bitstream/1903/6788/1/umi-umd-4274.pdf

Added after 2 minutes:

velocity saturation **broken link removed**

Added after 2 minutes:

sorry but the pic link is not copied to the site from the clipboard

 

[erikl]

what is velocity saturation

What is velocity saturation effect? How it is related to IC layouts?
Dipak

Carrier velocity v = µE (µ:mobility ; E:electric field strength) in silicon saturates at about 10^7 cm/s. This leads to an Id-vs-Vgs less than quadratic dependency, i.e. more linear behavior, meaning lower Id current, by this lower saturation voltage, but also lower transconductance.
Relation to layout: For a fixed VDD, E is inversely proportional to the gate length L. This means "long" transistors (L ≥ 10*Lmin) won't show the velocity saturation effect (at least at the process' min. VDD), whereas this effect will be more pronounced for L -> Lmin.