what is source synchronous devices..??

[jay_ec_engg]

data strobe source synchronous clock data

do anyone have any idea about source synchronous devices??? i heard that its tech to embedd clock with data signal... but dont know much about this.....
can anyone explain ..?

 

[zcq]

What to know more about this too.

 

[buzkiller]

h**p://www.fairchildsemi.com/products/interface/appfeature/sourcesynch.html

 

[wadaye]

It's means your data_out of your chip go with the clk_out, such as

SSRAM.

 

[hxnudt]

it sounds unimaginable! i can't understand either

 

[wadaye]

it sounds unimaginable! i can't understand either

Hi hxnudt :

Just read the manual of SDR-SRAM/DDR-SRAM, and you will see what I

mean.

wang1

 

[wufengbo]

it sounds unimaginable! i can't understand either

We known, synchronous data transfer is from a SOURCE to a DESTINATION. Traditionally, the clock signal is supplied by a OSC and it distribute the clock signal to both the source and the destination. But with source synchronous system, the clock signal is supplied by the SOURCE.

 

[wufengbo]

it sounds unimaginable! i can't understand either

We known, synchronous data transfer is from a SOURCE to a DESTINATION. Traditionally, the clock signal is supplied by a OSC and it distribute the clock signal to both the source and the destination. But with source synchronous system, the clock signal is supplied by the SOURCE.

Sorry, I post the reply twice. Please delete one , thanks.

 

[tom123]

sources synchronous devices are those device that

send out data and data strobe signal together.

so, if we keep data and data strobes delay equal,

then PCB trace's length is unrelevant.

for detail, please refer intel's AGP3.0 spec.



best regards

do anyone have any idea about source synchronous devices??? i heard that its tech to embedd clock with data signal... but dont know much about this.....
can anyone explain ..?

 

[vardan]

See chapter 16 "Clock Distribution" in "Complete Digital Design".

vardan