Waveform distortion at the output in a NMOS diff pair

[jalinmes]

diff pair distortion

Hi

A sine waveform being sent to a nmos diff pair. there is a nmos current source at the bottom and the load is a pair of pmos diode connected.

If the dc voltage level at the input is 3 volt, i got the distorted waveform at the output as shown in the photo. However the transistor actually is biased in saturation. Does anyone know how this happened?

when input is 2.5volt dc bias and send a sine waveform, the fifth harmonic at the output is -80dbc

Yet as being told, if dc voltage is 3 volt, the fifth order is -30dbc
signal is 600KHz

uploaded image is at the link below.
thanks
https://obrazki.elektroda.pl/70_1289230379.jpg

 

[BigBoss]

Re: diff pair distortion

You decrease the voltage headroom margin and that's why the waveform is clipped and creates harmonics.For maximum peak-to-peak swing Rc resistance can not excced (Vcc-Vsat1-Vsat2)/Itail..
Rc resistance should be lower than this..
Vsat1=Saturation voltage of diff pair..
Vsat2=Saturation voltage of current source..

 

[jalinmes]

Re: diff pair distortion

It doesnt exceed. The input voltage swing is big, amplitude is 400mV

 

[BigBoss]

Re: diff pair distortion

It doesnt exceed. The input voltage swing is big, amplitude is 400mV

In this case connect 2 small resistor (for instance 1-20 Ohm more or less ) at sources for each.These are degeneration resistors and they improve the linearity.