ivyahoney
Newbie level 6
Hello, all,
I want to design an amplifier that can driving large capacitor load, in order of ~mF before the circuit is stable.
I want to use this minimum selector output control circuit (shown in the attachement) to achieve the high dynamic output current, and in the same time keep the quiescent current as low as possible.
In my design, the transistor ratio (W/L) is very small.
Problem is, when the output stage is driving large current source (or sink) from VDD (or to GND), the two output transistor are going to linear region. I want to have a output current ability about several hundreds microampere.
What kind of considerations should I take?
Anyone who has any suggestions, please be kind to tell me, thanks a lot!
Ref.
Kclass-Jan de Langen, J.H. Huijing, “Compact low-voltage Power-Efficient Operational Amplifier Cells for VLSI,” in IEEE Journal of solid-state circuits
I want to design an amplifier that can driving large capacitor load, in order of ~mF before the circuit is stable.
I want to use this minimum selector output control circuit (shown in the attachement) to achieve the high dynamic output current, and in the same time keep the quiescent current as low as possible.
In my design, the transistor ratio (W/L) is very small.
Problem is, when the output stage is driving large current source (or sink) from VDD (or to GND), the two output transistor are going to linear region. I want to have a output current ability about several hundreds microampere.
What kind of considerations should I take?
Anyone who has any suggestions, please be kind to tell me, thanks a lot!
Ref.
Kclass-Jan de Langen, J.H. Huijing, “Compact low-voltage Power-Efficient Operational Amplifier Cells for VLSI,” in IEEE Journal of solid-state circuits