Via inductance vs diameter at high frequencies.

[Terminator3]

I just found an interesting image https://leleivre.com/images/via_inductance.png
It shows that VIAS with bigger radius have lower inductance.
What if we make really big "via", a metallized hole of diameter around 3mm. Low inductance expected? If we connect RF component to the edge of such metallized hole, will it provide good grounding with low inductance? For example FET with ground source.

Although from this paper: https://www.montana.edu/blameres/vitae/publications/a_thesis/thesis_002_msee.pdf
not only inductance becomes smaller, but capacitance raises.

Any benefits of using such big metallized holes?

 

[vfone]

The only advantage of using a 3mm diameter hole is that you can use that hole to hold the PCB using screws.
I think better than using a single 3mm hole is to use multiple vias in parallel. For the same area of a 3mm hole (7mm²) you can place 6 or even more small vias in parallel.

 

[FvM]

not only inductance becomes smaller, but capacitance raises

Capacitance matters for a ground via?

Generally, an array of multiple small vias will achieve lower inductance than a single large one and is the preferred method for inductance ground plane connections.