TekUT
Full Member level 6
I'm learning VHDL then may be my question should be easy for you but I need some hint to going on the subject. At now I've to code (or to better say I like to do) a VHDL code able to drive a 74HC595 register trough a four lines interface:
1. SSCLR
2. SSDAT
3. SSCLK
4. SSSTR
SSCLR will be used to clear the internal 74HC595 register
SSDAT used as data line, I've to put one bit each clock toggle
SSCLK clock for the internal 74HC595 shift registers
SSSTR strobe, used to load the data from the internal registers on the output
At now I'm doing all the task with a microcontroller and I like to do the same trough a dedicated logic circuit, from a logic flux point of view I've to implement this steps:
With this circuit I can load the parallel output of the 74HC595 with a word builded with just only one bit to 1 in order to test all the output.
My question is about what architecture is the best to use, a PROCESS architecure might be useful in this way? As I've read a PROCESS is a collection of statements that are processed in sequential way, but also I've see that signals are updated on the process exit but into this situation I've to update signal in real time to achieve the right behaviour. I'm are right or not about this point?
Thanks to all
Powermos
1. SSCLR
2. SSDAT
3. SSCLK
4. SSSTR
SSCLR will be used to clear the internal 74HC595 register
SSDAT used as data line, I've to put one bit each clock toggle
SSCLK clock for the internal 74HC595 shift registers
SSSTR strobe, used to load the data from the internal registers on the output
At now I'm doing all the task with a microcontroller and I like to do the same trough a dedicated logic circuit, from a logic flux point of view I've to implement this steps:
Code:
dataword = 1;
For (i=0; i<=15; i++)
{
SSCLR <= 0;
wait;
SSCLR <= 1;
wait;
For (j=0; j<15;j++)
{
SSDAT <= dataword[j];
wait;
SSCLK <= 1;
wait;
SSCLK <= 0;
wait;
}
SSSTR <= 1;
wait;
SSSTR <= 0;
wait;
dataword << 1;
}
With this circuit I can load the parallel output of the 74HC595 with a word builded with just only one bit to 1 in order to test all the output.
My question is about what architecture is the best to use, a PROCESS architecure might be useful in this way? As I've read a PROCESS is a collection of statements that are processed in sequential way, but also I've see that signals are updated on the process exit but into this situation I've to update signal in real time to achieve the right behaviour. I'm are right or not about this point?
Thanks to all
Powermos