manasa4
Newbie level 3
hello,can any one explain how to get multiplicative inverse for 4 bit input,i.e,for modulo 17(2^4+1),i have written a code but its not being run ,
number in integer multiplicative inverse\
0 0
1 1
2 9
3 6
4 13
5 7
6 3
7 5
8 15
9 2
10 12
11 14
12 10
13 4
14 11
15 8
number in integer multiplicative inverse\
0 0
1 1
2 9
3 6
4 13
5 7
6 3
7 5
8 15
9 2
10 12
11 14
12 10
13 4
14 11
15 8
Code VHDL - [expand] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity mulinv is port(x:in std_logic_vector(3 downto 0); z:out std_logic_vector(3 downto 0)); end mulinv; architecture Behavioral of mulinv is signal xi,zi,t1,t2,y,q:integer; begin process(x) begin xi<=conv_integer(x); t2<=1; if (xi=1) then zi<=1; elsif (xi=0) then zi<=0; else t1<=17/xi; y<=17 mod xi; if(y=1) then zi<=(1-t1); else while (y/=1) loop q<=xi/y; xi<=xi mod y; t2<=t2+(q*t1); if xi=1 then zi<=t2; else q<=y/xi; y<=y mod xi; t1<=t1+(q*t2); end if; end loop; end if; zi<=(1-t1); end if ; z<=conv_std_logic_vector(zi,4); end process; end Behavioral;
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