Raj Kumar Parajuli
Newbie level 1
I am designing a FPGA using DEO-Nano Development Kit. I need a source code in verilog HDL which can count the number of pulses. The pulses are to be input into FPGA from external hardware after the enable signal is triggered to the external hardware. And the counted pulses are to be read or displayed in PC. I have no idea how to begin. Please could you help me ?