JohnG300c
Advanced Member level 4
I have a prototype board that uses a DDR2 SO-DIMM. Due to a design error, the DQS6 and DQS7 pairs are swapped. Would the design still work?
The DDR2 interface is very slow on this board and all 64 bits are written and read at the same time by my custom logic. This should have the effect that all DQS pairs should be driven at the same time such that having two of the pairs swapped should not matter (except for a slight timing difference).
The question is: Is the Altera HPCII DDR2 controller using the DQS strobes individually during initialization? If so, then the swapped pairs may cause things to break.
It may be possible to rework this board but if it works anyways, I may not need to (very hard to fix up traces around the SO-DIMM socket).
The device is an Arria II GX.
Thanks!
The DDR2 interface is very slow on this board and all 64 bits are written and read at the same time by my custom logic. This should have the effect that all DQS pairs should be driven at the same time such that having two of the pairs swapped should not matter (except for a slight timing difference).
The question is: Is the Altera HPCII DDR2 controller using the DQS strobes individually during initialization? If so, then the swapped pairs may cause things to break.
It may be possible to rework this board but if it works anyways, I may not need to (very hard to fix up traces around the SO-DIMM socket).
The device is an Arria II GX.
Thanks!
