UHF Transmitter Schematic

[darcyrandall2004]

uhf transmitter schematic

Hello All,

Out of interest and for the sake of my own learning, I have been trying to design a UHF transmitter.

The good news is, with my latest design I have achieved lock.
The bad news is that although I may have achieved lock, the output frequency is slighlty off the desired frequency and I am unable to view the demodulated intelligence signal on my Marconi test set.

To get to the stage of acheiving lock:
1. I first had to alter the components surrounding the resonator. The VCO would not oscillate at the frequencies I had simulated. I am guessing parasitic capacitances/inductances were responsible for this.
2. I had to remove the RF choke feeding the varactor and replace with a 10kohm resistor.

To help diagnose why the output frequency is slightly offset from the desired:
1. I have confirmed with a logic analyzer that the PLL is being setup with the correct data.
2. I modified the board, removing the 20MHz Fox oscillator and replaced with a 10MHz oscillator from CMAC -> no change.

I witnessed
1. if I program the PLL for an output of 440MHz with a 10MHz ref, ie R=1, FRAC=0, INT=44, MOD=400 then with my Marconi test I have been able to tune the reference osc so that I can achieve roughly 440MHz with an error of 100kHz(my channel spacings are supposed to be 25kHz).
2.If I program the PLL or an output of 450.325MHz with a 10MHz ref, ie R=1, FRAC =13, INT=45, MOD=400 I end up with a signal at roughly 448MHz.

I also think it is worth pointing out that the digital lock detect output is typically a value of 2.5V that occasionaly dips to 0.

Does anyone have any ideas as to why I am not achieving the expected output frequency?

Does anyone have any ideas as to different things a can try to diagnose the problem of both the wrong output frequency and the lack of the moduating intelligence signal?

I am thinking that the reference oscillator is not oscillating at the correct frequency, yet I cant understand why as it was purchased off the shelf.
There is no shielding on my board. Typically, should I be able to tune a UHF transmitter regardless of wether shielding is in place or not?

My schematics are here:
**broken link removed**

I will post a photo of the board I am working with in time. Perhaps the state of it will provide a hint as to why it is not working properly.

Thanks again
_________________
Regards, Darcy Randall, Perth, Western Australia

 

[mvs sarma]

uhf transmitter scematic

Hello All,

Out of interest and for the sake of my own learning, I have been trying to design a UHF transmitter.

The good news is, with my latest design I have achieved lock.
The bad news is that although I may have achieved lock, the output frequency is slighlty off the desired frequency and I am unable to view the demodulated intelligence signal on my Marconi test set.

To get to the stage of acheiving lock:
1. I first had to alter the components surrounding the resonator. The VCO would not oscillate at the frequencies I had simulated. I am guessing parasitic capacitances/inductances were responsible for this.
2. I had to remove the RF choke feeding the varactor and replace with a 10kohm resistor.

To help diagnose why the output frequency is slightly offset from the desired:
1. I have confirmed with a logic analyzer that the PLL is being setup with the correct data.
2. I modified the board, removing the 20MHz Fox oscillator and replaced with a 10MHz oscillator from CMAC -> no change.

I witnessed
1. if I program the PLL for an output of 440MHz with a 10MHz ref, ie R=1, FRAC=0, INT=44, MOD=400 then with my Marconi test I have been able to tune the reference osc so that I can achieve roughly 440MHz with an error of 100kHz(my channel spacings are supposed to be 25kHz).
2.If I program the PLL or an output of 450.325MHz with a 10MHz ref, ie R=1, FRAC =13, INT=45, MOD=400 I end up with a signal at roughly 448MHz.

I also think it is worth pointing out that the digital lock detect output is typically a value of 2.5V that occasionaly dips to 0.

Does anyone have any ideas as to why I am not achieving the expected output frequency?

Does anyone have any ideas as to different things a can try to diagnose the problem of both the wrong output frequency and the lack of the moduating intelligence signal?

I am thinking that the reference oscillator is not oscillating at the correct frequency, yet I cant understand why as it was purchased off the shelf.
There is no shielding on my board. Typically, should I be able to tune a UHF transmitter regardless of wether shielding is in place or not?

My schematics are here:
**broken link removed**

I will post a photo of the board I am working with in time. Perhaps the state of it will provide a hint as to why it is not working properly.

Thanks again
_________________
Regards, Darcy Randall, Perth, Western Australia

While I accept that I am no expert, can you try with a clock of 10MHz as reference, whether you could achieve lock closer to desired value, please ???
Sarma

 

[FvM]

uhf transmitter australia

I also think it is worth pointing out that the digital lock detect output is typically a value of 2.5V that occasionaly dips to 0.

I guess, this means, the PLL doesn't lock, but how can we know, if you even don't tell the used PLL chip?

To check the VCO design, I suggest to break the PLL loop and apply a variable DC voltage to loop filter input.

 

[darcyrandall2004]

uhf transmitter schematics

Hello,

This website is a gem...already two responses...thanks

The absence of a part number for the PLL chip was not intentional. The PLL is Analog devices ADF4154. It is a fractional synthesizer.

I have tried two different reference oscillators. Fox 914E ,20 MHz VCXO and Cmac IQVCXO-161. Both showed similar results. When I programmed the PLL for an output frequency of 450.325MHz I instead achieved roughly 448MHz.

I will try the 20MHz Fox 914E with the PLL set at 440MHz and see if If there is a difference in results compared to that with the 10MHz reference.

Added after 1 hours 25 minutes:

Hello,

I tried the Fox 20MHz oscillator with the PLL programmed for 440MHz, again I achieved the same response, I was only able to tune to 100kHz of 440MHz.

I broke the PLL loop filter and injected DC. The VCO will oscillate between 435 and 460MHz using a 0 to 3Vdc input.

Cheers

 

[biff44]

440mhz transmitter schematic

A good way to start is to use the tools that analog devices provides.

**broken link removed**

You will notice is you run this for your 400 MHz case that there is a big red error message at the bottom of the screen. Those sort of messages are useful.

 

[darcyrandall2004]

schematic of 10mhz oscillator

I got a fright when I read that the minimum frequency was 500MHz.

However the datasheet does state "For lower frequencies,
ensure slew rate (SR) > 396 V/μs." Having said that If my quick rough calculations are correct, I am not meeting this spec. I will experiment with altering the attenuator just before the PLL, perhaps this will improve things.

Cheers

Does anyone know of any other FRACTIONAL synthesizers that can be used for frequencies less than 500MHz, they seem to be pretty rare?

Added after 1 hours 46 minutes:

Biff,

You are a legend. I changed the amount of attenuation just prior to the PLL from the VCO. I then programmed the tx for a frequency of 450.325MHz and I was able to tune to a value of 600Hz from 450.325MHz. Hopefully I can improve upon this.

Im going to redesign my loop filter. According to the equations provided in "Complete Wireless Design", my damping factor is a value of roughly 100 when it should be less than 1. Perhaps this is the reason why the demodulated signal does not appear on my test set.

Cheers.

Added after 1 hours 12 minutes:

IT WORKS!!!!

Yeehaw. After changing the loop filter components I have been able to successfully view a demodulated square wave on my Marconi test set at the desired 450.325MHz frequency. Granted there are other oscillations present on my waveform and the design wouldnt be emc compliant but regardless the result is still satisfying.

cheers