Uart with parity check

[johnbizzee]

Hi, I have a question on how to simulate this situation.

I have a working UART with parity checker that I synthesized to a Spartan 3 FPGA.

If the parity check is incorrect, a signal will be set to high. This signal I routed to an LED on the FPGA board. I use Putty on Windows to communicate with the serial port and enter data to be transmitted through the terminal.

How do I emulate the receiver receiving the wrong data to light up the parity error led?

 

[doham]

Can you configure putty using the opposite parity?

Or make a HDL block that generates UART signal with wrong parity and loop it into your receiver block.

Or simulate?