Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

the ways for simulaion BandGap

Status
Not open for further replies.
J

jiangwp

Guest
For a BandGap, i have simulated some parameters, such as:

1. the PSRR;
2. the output impedance;
3. the input referred noise;
4. the temperature coeffient;

But the three sides : Startup circuit, frequency and stability . i do not know how to simulate them.

for Startup circuit:
I done: 1) the dc sweep(for power supply) to probe the current of isolation transistor;
2) the transistant analysis (for power supply) to verify the work of Bandgap;

May be there are alternate sides simulations for Startup circuit . Could you tell me?

For the frequency simulation (the elmilation time for output reference(voltage and current) to settle to a interference) or the response time. So we can add a bypass capacitance to deduce the effect of interference.

Is there some model and way to simualite it?

for the stability:
Due to the negative and postive feedbak are exist in Bandgap.
How is the stability simulated?
 

I have the same question, who can reply it?
thanks
 

For startup, maybe you should make a transient analysis to vdd (turn 0 to high)
 

To simulate correct startup you must carry out DC and TRANSIENT simulations using different algorithms in you simulator. Sometimes, the solution depends on the algorithm the simualtor uses to converge. If under all possible algorithms your bandgap starts up in the same way then you can have high probability that your circuit will operate fine.

During transient simulations, put a resistor in series with your Vdd source and connect a capacitor to the ground at the other side of the resistor. That is, the capacitor is in parallel with the power supply terminals of your bandgap. Make transient simulations for several values of that capacitor. This represents more realistic startup conditions. Repeat the simulation using TRAP, backward Euler, GEAR and any integration method your simulator supports.

Some simulators like SMASH have a command to test startup by automatically using all supported algorithms. See the web page of Smash by Dolphin Integration.
 

In HSPICE, how to set the best time step for a startup operation in TRANSIENT analysis?
 

During transient simulations, put a resistor in series with your Vdd source and connect a capacitor to the ground at the other side of the resistor. That is, the capacitor is in parallel with the power supply terminals of your bandgap. Make transient simulations for several values of that capacitor. This represents more realistic startup conditions.

What resistor value should I use and what range of capacitance should I simulate? Also is the RC modeling the wire interconnect?

Thanks

Added after 57 minutes:

Does R=120Ω and C=800fF sound good?

Thanks
 

Hum, do you mean like this? And should resistance of R be very smaller to modling the line impedance?
And should we set the algorithm with .options METHOD=TRAP[GEAR, Euler or so?]
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top