The max rating of drain current

[noor84]

Hi,

I use a transistor(MOSFET NMOS,PMOS) in the cadence but I don't know how can I know the rating Id current (Max Id current), the voltages are 3.3V (max for VGS and the VDS) but what about the Id max? I put the VGS and VDS 3.6 and the current is raised as long as the width maximize!!! how can I know the max Id from simulation or any other method?

Regards,

 

[dick_freebird]

Plenty of layers to that onion.

Usually we go for performance first and figure out reliability during
physical design, as temperature is the big deal and application
and packaging and die layout all weigh in, on that.

If your models give trise you could keep an eye on that, allocating
some fraction of total die to ambient temp rise to in-silicon (all the
model could know about).

 

[noor84]

Plenty of layers to that onion.

Usually we go for performance first and figure out reliability during
physical design, as temperature is the big deal and application
and packaging and die layout all weigh in, on that.

If your models give trise you could keep an eye on that, allocating
some fraction of total die to ambient temp rise to in-silicon (all the
model could know about).

Hi dick_freebird,
Thank you for your reply,

your reply is useful and has new information, but again "how can I know the max Id from simulation or any other method?"

regards.

 

[dick_freebird]

If you mean "what drain current will not damage the device?", that
will not be found in the model except as crude imax, imelt warning flags.
Externalities matter to a lot of "reliability stuff". Like, a common thing will
be to break up a wide device into fingers such that electromigration
will not be the failure mode. But that will have very different end-optima
depending on whether you will market the part as commercial (70C,
plastic pkg), industrial (85C, low cost ceramic / high temp mold compound)
or mil / space (hermetic ceramic). Jmax will be way lower as you go hotter.
But the process physical data, the as-processed worst case of all that, the
reliability studies that give Jmax @ temp for X years service life, all reside
elsewhere and the designer's job requires pulling it all together from the
wherever they may sit.

But somebody probably has put sandbagged rules in the layout design
manual which should be part of the PDK bundle.