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Smps output spike problem

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satiz

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Hi , I designed a smps with three different output using tny series IC. The three different outputs are 15volt, 18volt and 14 volt it's working. If I connect 20ohms load at the 15 volt output side the voltage is dropping to 14.8 volts. How can I avoid this ? 2. There are lot of spikes at my output side how can I avoid those spikes, 3. I connected lm1117 5 volt constant output ldo it's getting heat without load why it's getting so much heat ? Iused proper snuber circuit at my output side. Please help me to solve this issue
 

Many questions.

15V load regulation - first determine whether this is a prime
feedback or cross-regulated and regulated "secondhand".
You can't expect perfect regulation when it's not the fed-
back quantity itself. Look at ground rise (return current)
and its contribution to feedback error, and whether the
feedback voltage divider point is or is not staying as-set.

Spikes, you need to be clear about their nature. Spikes
every cycle may be due to a combination of too much
inductor interwinding C (HF shoot-through) and poor or
mis-located or too little HF filter caps, where you need
a very low ESL to make the caps effective against the
interwinding capacitance. But a stiff decouple to a
spikey ground can put the ground noise onto the output
too; ground needs to be real solid. Too much capacitance
on the switch nodes can really bounce the ground; if the
spikes are only on the HL edge then look to ground quality
and Cout of the PWM and the power stage. I think if you call
your output filter a "proper snubber" maybe it's not as proper
as you believe.

LM1117has a rec max 15V, abs max 20V input rating. You
don't say which supply it's powered from. Maybe your
spikes plus set voltage exceed the rating.
 

Most of your problems can be understood with Ohm's Law and resistive dividers.

1) 0.2 / 15 V = 1.33% load regulation ...not bad

which is the similar to the ratio of your output impedance in your SMPS relative to the load.

Zout/20Ω= 1.33% , Zout= 267 mΩ. can easily be reduced by choice of FET or IC.

2) The spikes can be probe ground inductance or layout, so use tip& barrel of probe
If Cout is 100uF , standard caps will be ~1-2 Ohms ESR which is much greater than your DC Zout with negative feedback. So low ESR caps with low DCΩ choke or ferrite beads are needed for low noise.

If you choose parts to be <1% ESR of Rload min. then load regulation and ripple will be 1%. Ok? So choose specs, then best parts you can afford.

3) With LDO's the current in regulator passes thru to Vin so dummy R's in series can share the voltage drop. With 15/3.3V is almost 5x power lost in regulator as consumed by load and ADJ R current.
 
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But a stiff decouple to a
spikey ground can put the ground noise onto the output
too; ground needs to be real solid.

If you don't mind, could you elaborate what you mean with stiff decoupling?
 

stiff = strong i.e. low ESR and low I/C ratio =dv/dt
These can handle larger current spikes with low voltage.

Often done with choke or ferrite & plastic caps which have low ESR but Outside the feedback loop so stability is not affected.

Did you retest with no probe ground clip? using tip and barrel...
 

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