eng.amr2009
Junior Member level 3
Hi guys,
I have been searching about the clock uncertainty and what I got is that it represents the maximum skew @ clock inputs of different flops for a given clock tree. If this understanding is correct kindly confirm.
My question here is, what are the basis that I should use to be able to set the clock uncertainty in synthesis flow ? And if I leave it unset, what would the tool assume ?
Sometimes I have seen that the clock setup&hold uncertainties are not equal !! What does this mean ?
Based on my understanding above, there is a maximum value of positive or negative skew around the ideal clock edge, what is the meaning of setup&hold terms in this context ?
Thanks,
Best Regards,
I have been searching about the clock uncertainty and what I got is that it represents the maximum skew @ clock inputs of different flops for a given clock tree. If this understanding is correct kindly confirm.
My question here is, what are the basis that I should use to be able to set the clock uncertainty in synthesis flow ? And if I leave it unset, what would the tool assume ?
Sometimes I have seen that the clock setup&hold uncertainties are not equal !! What does this mean ?
Based on my understanding above, there is a maximum value of positive or negative skew around the ideal clock edge, what is the meaning of setup&hold terms in this context ?
Thanks,
Best Regards,