Serdes design, need IEEE paper help

[baichi]

Hi, guys, I am doing 10G Serdes circuit design stuffs, I need some IEEE paper, thank you so much.
(1)Design and verification of multi-gigabit transmission channels using equalization techniques
(2) A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization
(3)Clock Recovery and Equalization Techniques for Lossy Channels in Multi Gb/s Serial Links

 

[bassa]

Here we do not accept any IEEE paper request (read this announcement https://www.edaboard.com/threads/168924/) but some universities have an access to IEEE papers so you may find such universities from your location or you may get a paid subscription form IEEE

Alternatively you may search Google, some authors they published their papers in their webs or directly you may contact (preferably email) the author to obtain a copy

 

[grrr]

ftp://xxxx/xxxx.pdf
**broken link removed** (univ of pavia & STmicro)

MODERATOR ACTION: Attachment is deleted - © Springer Science+Business Media B.V. 2009

 

[bassa]

M. Steyaert et al. (eds.), Analog Circuit Design,

© Springer Science+Business Media B.V. 2009