SDRAM controller use CPLD

[moira]

use sdram controller from xess

there're lots of files abt SDRAM controller on the internet,
i'v seen some of them, none of them can be used in my project.

in my project,
CPLD functions:
1. receive data(8-bit parallel) from 89c52,
2. write and read sdram(1Mx4Banksx16bits),
the address and all the control signals are generated by CPLD

in the references,
FPGA doesn't generate the address,
the addressbus is provided by mcu(maybe arm) ,

i do't know if i can implement the functions.
should i use FPGA?
how to process the address-bus?

pls give me some advices



moira

 

[hoangthanhtung]

cpld sdram

You can search in xess.com. In this site, there is a examples about SDRAM controller. Check the schematic of XS95 board, you can know how to interface between CPLD and microcontroller 8051

 

[ashishjindal76]

hi

also u can chek the sdram controller at altera.com there u can get the coding both in verilog as well as in vhdl. to get the idea regarding sdram controller search the net. ram controller is also availble at opencores.org

bye
ashish

 

[seamas]

Since SDRAM controller is a little complex,FPGA will be more suitable than CPLD.
There are a good reference in **broken link removed**

 

[sadat007]

Hi,
Can't we use FPSLIC - Devices from ATMEL?

 

[lucbra]

It all depends on what you want to achieve. I found the Lattice SDRAM controller for CPLDs sometimes useful as it implements just the bare minimum. It can be hooked up at µC as well.