tweedle
Newbie level 6
dear friends
can any one provide me with a sample and hold circuit diagram with appropriate switches. i have got one on the net but its not giving proper result. i am simulating it in pspice.i have got it at **broken link removed**.
if i use the 1 M resistor after the diodes then the output after the 1st buffer stage itself is wrong.
if i dont use it then also the sample and hold is not working properly.
pls help .urgent
thanx a lot in advance[/img]
can any one provide me with a sample and hold circuit diagram with appropriate switches. i have got one on the net but its not giving proper result. i am simulating it in pspice.i have got it at **broken link removed**.
if i use the 1 M resistor after the diodes then the output after the 1st buffer stage itself is wrong.
if i dont use it then also the sample and hold is not working properly.
pls help .urgent
thanx a lot in advance[/img]