Resistor Ladder Design and Layout

[celebrevida]

I am needing to generate somewhat precise voltage references. I have access to 1.5V.

I need the following references:
0.75V
0.807V to 0.969V in 0.0108V steps (so 16 references in total)


I am considering these two options using poly resistors:

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1) From vss to vref0p75: 375k resistor (actually 10*37.5k in series)
From vref0p75 to vref0p807, a 28.5k resistor
From vref0p807 to vref0p969, (15*5.3756k resistors in series, each tap represents the 16 references)
From vref0p969 to vref1p5, 265.9k resistor (actually 10*26.59k in series)

(Total resistances=750k to limit Iload to ~2uA)

This gives me exactly the references I need to within 1mV.

But by using an assortment of different resistors, I wonder how well this works over process variation.

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2) From vss to vref1p5, use 128*5.847k resistors in series. Then choose the taps closest to what I need.

For the vref0p75, this works, I simply access the middle tap. But for the other 16, it doesn't exactly line up and I can be as much as 10mV off. However, by using 128 unit resistors, perhaps this might actually a better choice than (1) due to less process variation?
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What is the best choice for resistor ladder design to get closest to the voltage references I want over process variation?

And is there a third scheme that is better than either that I should consider?

Thanks!

 

[dick_freebird]

Let's start with whether the 1.5V resource has the qualities to deliver 1mV at the divider output. At a usual 5% supply tolerance, that's "no" (+/-75mV /2 expect > 35mV range of variation from this alone).

1mV on 750mV is 0.14%. Hard to expect that from anything, even natural matching, let alone absolute accuracy, unless you trim.

Best natural divider tap accuracy will come from a sea of identical resistor segments, and arranged for thermal and geometric balance. However this may not be layout-area-ideal. You might shoot for making the 750mV and 807 and 969 all integer-segment taps (if practical) and then substitute a finer, as similar as practical sub-segment bank for the rack of 16 fine taps but keeping the same major-segment value for the aggregate.

 

[celebrevida]

Best natural divider tap accuracy will come from a sea of identical resistor segments, and arranged for thermal and geometric balance.

So then if I had to choose between the two schemes, (b) 128 unit resistor ladder is better, in your opinion.

You might shoot for making the 750mV and 807 and 969 all integer-segment taps (if practical) and then substitute a finer, as similar as practical sub-segment bank for the rack of 16 fine taps but keeping the same major-segment value for the aggregate.

Not quite sure I understand this part.

If I understand correctly, in order to get 750m, 807m and 969m taps with integer segments, I'd need 1500 resistors in series. Not sure that is too practical. Even 128 resistor segments is more than I'd like.

I guess you mean that for the 16 fine taps, I'd tap a resistor ladder between 969m and 807m voltages? I guess that might work but I'd need to first generate 969m and 807m somehow, then I'd need two OTAs so that I can drive this secondary 16-tap resistor ladder. I guess that's possible but its starting to get complicated and power hungry.

 

[BradtheRad]

What device do you plan to hook up to these voltage references? Isn't it liable to place a load on those high resistances, with the result of pulling the volt levels off spec?

This can occur even when measuring voltage with a meter (analog or digital), due to the instrument's input resistance.

There are FET-input components which require tiny input current. Or consider building lower ohm values in your resistor network.

=======================

Possible contrivances on which you can tap at various places along its length to obtain 16 voltage references:

* rheostat or nichrome wire, or very thin copper wire

* open up a potentiometer to expose the resistive carbon film

* expose the lead inside a pencil (made of graphite)

 

[celebrevida]

What device do you plan to hook up to these voltage references? Isn't it liable to place a load on those high resistances, with the result of pulling the volt levels off spec?

This can occur even when measuring voltage with a meter (analog or digital), due to the instrument's input resistance.

There are FET-input components which require tiny input current. Or consider building lower ohm values in your resistor network.

=======================

Possible contrivances on which you can tap at various places along its length to obtain 16 voltage references:

* rheostat or nichrome wire, or very thin copper wire

* open up a potentiometer to expose the resistive carbon film

* expose the lead inside a pencil (made of graphite)

This is for CMOS IC design.

Although there are 17 references in total, only 0.75V and 1 of 16 of the references are ever used and the intent is to select it via analog mux. The 0.75V and 1 of16 taps drives the inputs of 2 OTAs which are FETs so no current load whatsoever.

Scaling all the resistors down would save area but at the cost of more current along the resistor ladder. I felt 1.5/750k=2uA would be sufficient as OTA inputs hardly draw any current themselves.

 

[dick_freebird]

The notion of a single resistor stripe contacted at specific
points might be worth a closer look. It could be the most
compact. Might use "spurs" to attach the contacts rather
than trying to drop contacts onto the body "just so", you
can route local poly to flare those finely spaced contacts.
Probably want unsilicided poly, whatever the highest
sheet rho available is. See how well extraction does, at
picking off different contact styles and what assumptions
it may be making (right or wrong).

 

[BradtheRad]

Another possibility is a digital-to-analog resistor array. Binary weighted or R-2R.

6 bit gives you 64 volt levels to choose from.
5 bit gives you 32 volt levels to choose from.
Etc.

It may be possible to construct a counter that runs on 1.5v

You'll need to adjust repeatedly in order to create your desired high and low values.

 

[betwixt]

I think I would consider dividing much higher voltages where values are more practical, buffering then finally dividing down to the required voltages. It might even be possible to use PWM to generate original voltages then divide afterwards.

For example, the required difference between lowest and highest voltages is 0.162V. If a range of 0V to 5V was initially produced by DAC or PWM then the result divided by a single 30.86 it would produce the required offset from the lowest voltage and that could easily be added on. A 10 bit resolution would give steps of about 160uV. With care it might be possible to generate accurate enough voltages without adding the offset. This method only needs one precision divider circuit.

Brian.

 

[celebrevida]

Thanks for all replies.

I think I should explain the situation in more detail, namely, why I need reference voltages from 0.807 to 0.969V with 16 taps @ 0.0108V steps. Perhaps by explaining the big picture, it might be more helpful.

It is because I am using it in non-inverting amplifier configuration to boost the various inputs to 1.5V.

My input voltage will vary from 0.807V to 0.969V in 0.0108V steps and I am trying to produce Vout=1.5V based on Vin.

So to get the right gain for Vout=1.5V, I would need the following resistor taps along R1+R2 ladder:

Vin=0.807V. This requires R1=0.538*(R1+R2)
:
Vin=0.969V requires R1=0.646*(R1+R2)

These Vin voltages come from a resistor ladder inside a bandgap reference generator cell, and I will select them via analog mux. Therefore since the Vin is known and selectable, I simply use a second analog mux to select the tap along R1+R2 to feedback to the 1.8V/0V supply OTA so that the right gain is selected to obtain Vout=A*Vin=1.5V.

So the real task isn't to generate these 0.807V to 0.969V (in 0.0108V steps) per se.

Rather these are V- voltages I need to gain up to 1.5V. I am using an OTA in non-inverting configuration with variable feedback gain to do it as shown above.

I only have 1.8V supply. And I want to make the Iload on the OTA to be 2uA so I chose R1+R2=750k,

I did look into R2-R DAC but based on my actual situation, not sure that works.

Anyway if this additional detail is helpful and anyone has any further ideas, I really appreciate it!

If not then, I likely will just go with the Runit= (R1+R2)/128 and just find the taps closest to what I need to get close to Vout=1.5V.