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rectifier with mosfets

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luca89

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Hi to everyone , I am studying some new type of rectifier but I don't understand how adding this PMOS can increase the power available to the output .

diode mos.png
 

Why does your upper Mosfet have 4 terminals? Usually the substrate is internally connected to the source terminal and cannot be connected to ground like you show.
You have the gate connected to the drain so when the gate/drain and drain become 6V to 10V then the Mosfet turns on with a 6V to 10V forward voltage. But Mosfets have an internal diode from drain to source that will conduct when the voltage is 0.6V to 1.5V so the Mosfets will do the same as ordinary rectifiers.
 

Separate substrate terminal makes sense if the question is dedicated to analog IC design. You didn't tell.

In any case the circuit looks like a poor rectifier. Under the title "rectifier with MOSFETs", we would expect a kind of synchronous rectifier.
 

If the MOSFET gate gets the proper control signal it can provide the diode function with a much lower forward drop than a standard junction diode. This gives a higher output voltage and can avoid a heat-sink, even for high current levels.
The LT4320, for example, can provide those gate signals to give a very low-loss bridge rectifier circuit with maximum current limited only by the MOSFET on-resistance and current rating.
 

thanks Audioguru for your answer, but i would like to specify that this circuit is not invented by me , but can be found in literature. So The reason why is 4 terminal MOS is because this is a device for IC design so chip oriented. (maybe I forgot to tell about it) what you say that : usually bulk is connected with source is only true for discrete components not in ASIC. I also don't understand from where you pull out the numbers 6V and 10V. Anyway my question was just why the circuit with the NOMS and PMOS increase the efficiency than the case when we use only the NMOS.
I hope I made the question more clear. Thank again for your answer , I hope you will have more suggestions . have nice day
 

Thank you for your answer, yes you are right i forgot to say that is an IC design. However is not my design is a circuit I found in literature. I just want to understand why this circuit is more efficient than the same circuit but using only the NMOS. So I don't understand why if I add the PMOS the efficiency of the circuit increase. Hope the question is more clear.

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Your seem good considerations but I would like to understand this circuit not other possible solutions. This is a circuit found in literature I didnt invent it. PLease check my previous reply to understand what I'm looking for. Have nice day
 

Most Mosfets turn on very well when their gate voltage is 6V to 10V more than their source voltage, for example an IRF540. Some "logic level" Mosfets turn on very well when their gate voltage is 3.5V to 4.5V more than their source voltage, for example an IRL540 but few P-channel Mosfets. Some new tiny Mosfets turn on very well when their gate voltage is 1V to 3V. A Mosfet has a built-in diode as part of its structure that conducts like an ordinary silicon rectifier when the drain source becomes reverse-biased which will probably happen in your circuit.
 

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