walkon
Junior Member level 1
verilog conditional compilation
I have 3 sub-blocks and a top module load them with the conditioanl compilation command, here is parts of the top module.
`define N45TT;
`ifdef N45TT
N45TT N0TT1 (.in(output1), .out(OUTTT1));
//--------------------------------------------------------------
`elsif N50TT
N50TT N0TT1 (.in(output1), .out(OUTTT1));
//--------------------------------------------------------------
`elsif N55TT
N55TT N0TT1 (.in(output1), .out(OUTTT1));
The only way I know to switch compiling between different blocks is to change the `define parameters from 'N45TT' to 'N50TT' or 'N55TT' so the top module could load the needed block with conditional compilation command.
Now I need to have the simulation run automatically from N45TT to N50TT to N55TT after some condition is met such like a counter is set to some value, say if i=1 run N45TT, i=2 run N50TT, i=3 run N55TT. How could I do this? Many thanks.
I have 3 sub-blocks and a top module load them with the conditioanl compilation command, here is parts of the top module.
`define N45TT;
`ifdef N45TT
N45TT N0TT1 (.in(output1), .out(OUTTT1));
//--------------------------------------------------------------
`elsif N50TT
N50TT N0TT1 (.in(output1), .out(OUTTT1));
//--------------------------------------------------------------
`elsif N55TT
N55TT N0TT1 (.in(output1), .out(OUTTT1));
The only way I know to switch compiling between different blocks is to change the `define parameters from 'N45TT' to 'N50TT' or 'N55TT' so the top module could load the needed block with conditional compilation command.
Now I need to have the simulation run automatically from N45TT to N50TT to N55TT after some condition is met such like a counter is set to some value, say if i=1 run N45TT, i=2 run N50TT, i=3 run N55TT. How could I do this? Many thanks.