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questions about Vth variation

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walker5678

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I am using CSMC 0.5um process to design an ananlog circuit , and use "print->DC operating point " to check the Vth of different NMOS transistors, which have different W/L size. I found that transistors with smaller "L" has larger Vth, and smaller vds also has smaller Vth. It seems not correct according to the transistor physics.
Could anyone tell what the problem is, and what's the relationship between Vth and the transistor size?

Thanks in advance.
 

You were observing reverse short channel effect.... this is normal behaviour for the technology 0.18um and below.....
 

Hi, pbs681

Could you explain more about the "reverse short channel effect"? In what situation this effect will take place?

thanks!
 

what I think, Vt is different for different transistor because it depend upon the souce, and drain terminal that how they are connected.
Probably, in your circuit all of the transistor source and drain are connected to different potential. As aresult transistors are showing different value for Vth.

If I am wrong Please anybody let me know.
Thanks!
 

You can find the vth parameter in the model file, so you will see how it is related to the component size for the process you use.
 

I mean, check how the original vth is related to the dimension, so you can make sure if it is affected by the bias or not.
 

Try the equations of the spice model, they shoy how the Vth is affected (it is not showed in level 1, use level 3 or a higer level to see the effects):
 

Hello walker5678,

What you have seen makes sense. Perhaps you used the level 1 equations for your initial judjements while those equations are not valid in submicron technologies. For submicron technologies you have to use higher order models. For example if you look at level three equations you can see that the Vth of a transistor increases by decreasing Leff and also it increases by increasing Vds. For reference take a look at the equation (16.43) of Razavi's book.

OpAmp
 

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