Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

question on static timing analysis....

Status
Not open for further replies.

deepa122

Newbie level 5
Joined
Jan 4, 2009
Messages
10
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Activity points
1,340
why is hold time less than the set up time?
 

first you should know the condition of the STA for your design!
 

hai
first u will read setup and hold time concept and then u check it..if u didnt get any results.i will tell and i will send some materails ..
 

Hi,

pls find the attached docs for sta.

Thanks..

HAK..
 

the ppt is very good,thanks a lot
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top