dsMasoud
Junior Member level 3
I have to perform a project with spartan-3 fpga . i have xc3s400 and xc18v04 as FPGA and PROM. for performing the project i made a pcb based on the circuit from xilinx application note xapp453 "The 3.3v configuration of spartan-3 FPGAs" as below:
when i set the mode pins to master serial like schematic then after running the impact every time it find several unknown devices but when i set mode pins to boundary scan the impact can find both of the devices like below and program and verify them successfully:
now my first question is :
why in master serial mode configuration like the above schematic impact can not find the right devices and program them?
my second question is about prom :
while programming the prom i check the LOAD FPGA option like below:
but after successfully erasing,programming and verifying the PROM the loading of FPGA with Prom don't complete and the DONE pin stay in low state you can see the console:
my question is why after programming the prom it can not load data to the FPGA and what is wrong with this process?
i hope you can help me to find the solution. i have dealing with this problem for 1 month but i could not manage with it.
please don't advise me to buy a starter kit or xcfxxs because it is impossible for me.
best regards
when i set the mode pins to master serial like schematic then after running the impact every time it find several unknown devices but when i set mode pins to boundary scan the impact can find both of the devices like below and program and verify them successfully:
now my first question is :
why in master serial mode configuration like the above schematic impact can not find the right devices and program them?
my second question is about prom :
while programming the prom i check the LOAD FPGA option like below:
but after successfully erasing,programming and verifying the PROM the loading of FPGA with Prom don't complete and the DONE pin stay in low state you can see the console:
my question is why after programming the prom it can not load data to the FPGA and what is wrong with this process?
i hope you can help me to find the solution. i have dealing with this problem for 1 month but i could not manage with it.
please don't advise me to buy a starter kit or xcfxxs because it is impossible for me.
best regards