testing test
Member level 3
Hi,
The following piece of Verilog code is causing some problem. It's compiling fine in ModelSim but when run, it doesn't stop. Probably there might be some problem with the loops. Please go through the code and suggest any possible solutions.
Thank you.
The following piece of Verilog code is causing some problem. It's compiling fine in ModelSim but when run, it doesn't stop. Probably there might be some problem with the loops. Please go through the code and suggest any possible solutions.
Thank you.
Code:
for (i=0;i<=3;i=i+1)
begin
for (m=0;m<=1;m=m+1)
begin
if (m==0)
begin
Transformed_Value=tempSR[o][i];
end
else
begin
temp=Transformed_Value[7];
Transformed_Value=Transformed_Value<<1;
end
if (temp==1'b1)
begin
Transformed_Value=Transformed_Value^8'h1b;
temp=1'b0;
end
if (Multiplier_Matrix[k][n][m]==1)
begin
Variable=Variable^Transformed_Value;
end
end
n=n+1;
end